[core] code format
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@ -69,9 +69,11 @@ std::string RepackDesignConstraints::find_constrained_pin_net(
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return constrained_net_name;
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}
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openfpga::BasicPort RepackDesignConstraints::net_pin(const std::string& net) const {
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openfpga::BasicPort RepackDesignConstraints::net_pin(
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const std::string& net) const {
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openfpga::BasicPort constrained_pin;
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for (const RepackDesignConstraintId& design_constraint : design_constraints()) {
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for (const RepackDesignConstraintId& design_constraint :
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design_constraints()) {
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if (net == repack_design_constraint_nets_[design_constraint]) {
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constrained_pin = pin(design_constraint);
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break;
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@ -614,8 +614,9 @@ static void add_lb_router_nets(
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} else if (design_constraints.unconstrained_net(constrained_net_name)) {
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constrained_atom_net_id = atom_net_id;
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/* Skip for the net which has been constrained on other pins */
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if (atom_net_id && design_constraints.net_pin(
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atom_ctx.nlist.net_name(atom_net_id)).is_valid()) {
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if (atom_net_id &&
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design_constraints.net_pin(atom_ctx.nlist.net_name(atom_net_id))
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.is_valid()) {
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VTR_LOGV(verbose,
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"Skip net '%s' on pin '%s[%d]' during repacking since it has "
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"been constrained to another pin\n",
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