[lib] developing
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tangxifan
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fe594acab1
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9eb2374bc6
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#include "clock_network.h"
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#include <algorithm>
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#include "vtr_assert.h"
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#include "vtr_log.h"
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namespace openfpga { // Begin namespace openfpga
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/************************************************************************
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* Member functions for class ClockNetwork
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***********************************************************************/
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/************************************************************************
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* Constructors
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***********************************************************************/
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ClockNetwork::ClockNetwork() { return; }
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/************************************************************************
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* Public Accessors : aggregates
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***********************************************************************/
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ClockNetwork::bus_group_range ClockNetwork::buses() const {
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return vtr::make_range(bus_ids_.begin(), bus_ids_.end());
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}
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/************************************************************************
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* Public Accessors : Basic data query
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***********************************************************************/
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openfpga::BasicPort ClockNetwork::bus_port(const ClockNetworkId& bus_id) const {
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VTR_ASSERT(valid_bus_id(bus_id));
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return bus_ports_[bus_id];
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}
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bool ClockNetwork::is_big_endian(const ClockNetworkId& bus_id) const {
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VTR_ASSERT(valid_bus_id(bus_id));
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return bus_big_endians_[bus_id];
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}
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std::vector<BusPinId> ClockNetwork::bus_pins(const ClockNetworkId& bus_id) const {
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VTR_ASSERT(valid_bus_id(bus_id));
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return bus_pin_ids_[bus_id];
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}
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int ClockNetwork::pin_index(const BusPinId& pin_id) const {
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VTR_ASSERT(valid_pin_id(pin_id));
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return pin_indices_[pin_id];
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}
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std::string ClockNetwork::pin_name(const BusPinId& pin_id) const {
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VTR_ASSERT(valid_pin_id(pin_id));
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return pin_names_[pin_id];
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}
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ClockNetworkId ClockNetwork::find_pin_bus(const std::string& pin_name) const {
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std::map<std::string, BusPinId>::const_iterator result =
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pin_name2id_map_.find(pin_name);
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if (result == pin_name2id_map_.end()) {
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/* Not found, return an invalid id */
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return ClockNetworkId::INVALID();
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}
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/* Found, we should get the parent bus */
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BusPinId pin_id = result->second;
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return pin_parent_bus_ids_[pin_id];
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}
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ClockNetworkId ClockNetwork::find_bus(const std::string& bus_name) const {
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std::map<std::string, ClockNetworkId>::const_iterator result =
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bus_name2id_map_.find(bus_name);
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if (result == bus_name2id_map_.end()) {
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/* Not found, return an invalid id */
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return ClockNetworkId::INVALID();
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}
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/* Found, we should get the parent bus */
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return result->second;
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}
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BusPinId ClockNetwork::find_pin(const std::string& pin_name) const {
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std::map<std::string, BusPinId>::const_iterator result =
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pin_name2id_map_.find(pin_name);
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if (result == pin_name2id_map_.end()) {
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/* Not found, return an invalid id */
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return BusPinId::INVALID();
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}
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/* Found, we should get the parent bus */
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return result->second;
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}
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bool ClockNetwork::empty() const { return 0 == bus_ids_.size(); }
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/************************************************************************
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* Public Mutators
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***********************************************************************/
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void ClockNetwork::reserve_buses(const size_t& num_buses) {
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bus_ids_.reserve(num_buses);
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bus_ports_.reserve(num_buses);
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bus_big_endians_.reserve(num_buses);
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bus_pin_ids_.reserve(num_buses);
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}
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void ClockNetwork::reserve_pins(const size_t& num_pins) {
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pin_ids_.reserve(num_pins);
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pin_indices_.reserve(num_pins);
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pin_names_.reserve(num_pins);
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pin_parent_bus_ids_.reserve(num_pins);
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}
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ClockNetworkId ClockNetwork::create_bus(const openfpga::BasicPort& bus_port) {
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/* Create a new id */
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ClockNetworkId bus_id = ClockNetworkId(bus_ids_.size());
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bus_ids_.push_back(bus_id);
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bus_ports_.push_back(bus_port);
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bus_big_endians_.push_back(true);
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bus_pin_ids_.emplace_back();
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/* Register to fast look-up */
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auto result = bus_name2id_map_.find(bus_port.get_name());
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if (result == bus_name2id_map_.end()) {
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bus_name2id_map_[bus_port.get_name()] = bus_id;
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} else {
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VTR_LOG_ERROR("Duplicated bus name '%s' in bus group",
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bus_port.get_name().c_str());
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exit(1);
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}
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return bus_id;
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}
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void ClockNetwork::set_bus_big_endian(const ClockNetworkId& bus_id,
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const bool& big_endian) {
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VTR_ASSERT(valid_bus_id(bus_id));
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bus_big_endians_[bus_id] = big_endian;
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}
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ClockSpineId ClockNetwork::create_spine(const std::string& name) {
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/* Check if the name is already used or not */
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auto result = spine_name2ids_.find(name);
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if (result != spine_name2ids_.end()) {
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return ClockSpineId::INVALID();
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}
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/* Create a new id */
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ClockSpineId spine_id = ClockSpineId(spine_ids_.size());
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VTR_ASSERT(valid_spine_id(spine_id));
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spine_ids_.push_back(spine_id);
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spine_names_.push_back(name);
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spine_levels_.emplace_back();
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spine_start_points_.emplace_back();
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spine_end_points_.emplace_back();
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spine_switch_points_.emplace_back();
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spine_switch_coords_.emplace_back();
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spine_parent_.emplace_back();
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spine_parent_tree_.emplace_back();
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/* Register to the lookup */
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spine_name2ids_[name] = spine_id;
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return spine_id;
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}
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void ClockNetwork::set_spine_parent_tree(const ClockSpineId& spine_id, const ClockTreeId& tree_id) {
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VTR_ASSERT(valid_spine_id(spine_id));
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VTR_ASSERT(valid_tree_id(tree_id));
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spine_parent_tree_[spine_id] = tree_id;
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}
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void ClockNetwork::set_spine_start_point(const ClockSpineId& spine_id, const vtr::Point<int>& coord) {
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VTR_ASSERT(valid_spine_id(spine_id));
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spine_start_points_[spine_id] = coord;
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}
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void ClockNetwork::set_spine_end_point(const ClockSpineId& spine_id, const vtr::Point<int>& coord) {
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VTR_ASSERT(valid_spine_id(spine_id));
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spine_end_points_[spine_id] = coord;
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}
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void ClockNetwork::add_spine_switch_point(const ClockSpineId& spine_id, const ClockSpineId& drive_spine, const vtr::Point<int>& coord) {
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VTR_ASSERT(valid_spine_id(spine_id));
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spine_switch_points_[spine_id].push_back(drive_spine);
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spine_switch_coords_[spine_id].push_back(coord);
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}
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/************************************************************************
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* Internal invalidators/validators
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***********************************************************************/
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bool ClockNetwork::valid_tree_id(const ClockTreeId& tree_id) const {
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return (size_t(tree_id) < tree_ids_.size()) && (tree_id == tree_ids_[tree_id]);
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}
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bool ClockNetwork::valid_spine_id(const ClockSpineId& spine_id) const {
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return (size_t(spine_id) < spine_ids_.size()) && (spine_id == spine_ids_[spine_id]);
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}
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} // End of namespace openfpga
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@ -10,6 +10,7 @@
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/* Headers from vtrutil library */
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#include "vtr_vector.h"
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#include "vtr_geometry.h"
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/* Headers from openfpgautil library */
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#include "clock_network_fwd.h"
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@ -68,10 +69,10 @@ class ClockNetwork {
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ClockSpineId create_spine(const std::string& name);
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/* Set the parent tree for a given spine. It is illegal that a spine which does not belong to any tree */
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void set_spine_parent_tree(const ClockSpineId& spine, const ClockTreeId& parent_tree);
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void set_spine_start_point(const ClockSpineId& spine, const vtr::Point<int>& point);
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void set_spine_end_point(const ClockSpineId& spine, const vtr::Point<int>& point);
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void add_spine_switch_point(const ClockSpineId& spine, const ClockSpineId& drive_spine, const vtr::Point<int>& coord);
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void set_spine_parent_tree(const ClockSpineId& spine_id, const ClockTreeId& tree_id);
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void set_spine_start_point(const ClockSpineId& spine_id, const vtr::Point<int>& coord);
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void set_spine_end_point(const ClockSpineId& spine_id, const vtr::Point<int>& coord);
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void add_spine_switch_point(const ClockSpineId& spine_id, const ClockSpineId& drive_spine, const vtr::Point<int>& coord);
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public: /* Public invalidators/validators */
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/* Show if the tree id is a valid for data queries */
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@ -82,20 +83,20 @@ class ClockNetwork {
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private: /* Internal data */
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/* Basic information of each tree */
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vtr::vector<ClockTreeId, ClockTreeId> clk_tree_ids_;
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vtr::vector<ClockTreeId, std::string> clk_tree_names_;
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vtr::vector<ClockTreeId, std::vector<ClockSpineId>> clk_tree_top_spines_;
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vtr::vector<ClockTreeId, ClockTreeId> tree_ids_;
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vtr::vector<ClockTreeId, std::string> tree_names_;
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vtr::vector<ClockTreeId, std::vector<ClockSpineId>> tree_top_spines_;
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/* Basic information of each spine */
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vtr::vector<ClockSpineId, ClockSpineId> clk_spines_;
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vtr::vector<ClockSpineId, std::string> clk_spine_names_;
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vtr::vector<ClockSpineId, size_t> clk_spine_levels_;
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vtr::vector<ClockSpineId, vtr::Point<int>> clk_spine_start_points_;
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vtr::vector<ClockSpineId, vtr::Point<int>> clk_spine_end_points_;
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vtr::vector<ClockSpineId, std::vector<ClockSpineId>> clk_spine_switch_points_;
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vtr::vector<ClockSpineId, std::vector<vtr::Point<int>>> clk_spine_switch_coords_;
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vtr::vector<ClockSpineId, ClockSpineId> clk_spine_parent_;
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vtr::vector<ClockSpineId, ClockTreeId> clk_spine_parent_tree_;
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vtr::vector<ClockSpineId, ClockSpineId> spine_ids_;
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vtr::vector<ClockSpineId, std::string> spine_names_;
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vtr::vector<ClockSpineId, size_t> spine_levels_;
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vtr::vector<ClockSpineId, vtr::Point<int>> spine_start_points_;
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vtr::vector<ClockSpineId, vtr::Point<int>> spine_end_points_;
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vtr::vector<ClockSpineId, std::vector<ClockSpineId>> spine_switch_points_;
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vtr::vector<ClockSpineId, std::vector<vtr::Point<int>>> spine_switch_coords_;
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vtr::vector<ClockSpineId, ClockSpineId> spine_parent_;
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vtr::vector<ClockSpineId, ClockTreeId> spine_parent_tree_;
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/* Fast lookup */
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std::map<std::string, ClockSpineId> spine_name2ids_;
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