[core] now all the commands can be optionally hidden
This commit is contained in:
parent
4385b364af
commit
c7a4d25e35
|
@ -410,8 +410,19 @@ template <class T>
|
|||
void Shell<T>::print_commands(const bool& show_hidden) const {
|
||||
/* Print the commands by their classes */
|
||||
for (const ShellCommandClassId& cmd_class : command_class_ids_) {
|
||||
/* If there are only hidden commands inside, do not even need to show the class name here */
|
||||
bool hidden_class = true;
|
||||
for (const ShellCommandId& cmd : commands_by_classes_[cmd_class]) {
|
||||
if (!command_hidden_[cmd]) {
|
||||
hidden_class = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Print the class name */
|
||||
VTR_LOG("%s:\n", command_class_names_[cmd_class].c_str());
|
||||
if (!hidden_class && show_hidden) {
|
||||
VTR_LOG("%s:\n", command_class_names_[cmd_class].c_str());
|
||||
}
|
||||
|
||||
for (const ShellCommandId& cmd : commands_by_classes_[cmd_class]) {
|
||||
if (!show_hidden && command_hidden_[cmd]) {
|
||||
|
|
|
@ -21,7 +21,7 @@ namespace openfpga {
|
|||
template <class T>
|
||||
ShellCommandId add_repack_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("repack");
|
||||
|
||||
/* Add an option '--design_constraints' */
|
||||
|
@ -43,7 +43,7 @@ ShellCommandId add_repack_command_template(
|
|||
|
||||
/* Add command 'repack' to the Shell */
|
||||
ShellCommandId shell_cmd_id =
|
||||
shell.add_command(shell_cmd, "Pack physical programmable logic blocks");
|
||||
shell.add_command(shell_cmd, "Pack physical programmable logic blocks", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id, repack_template<T>);
|
||||
|
||||
|
@ -61,7 +61,7 @@ ShellCommandId add_repack_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_build_arch_bitstream_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("build_architecture_bitstream");
|
||||
|
||||
/* Add an option '--write_file' */
|
||||
|
@ -83,7 +83,7 @@ ShellCommandId add_build_arch_bitstream_command_template(
|
|||
|
||||
/* Add command 'build_architecture_bitstream' to the Shell */
|
||||
ShellCommandId shell_cmd_id =
|
||||
shell.add_command(shell_cmd, "Build fabric-independent bitstream database");
|
||||
shell.add_command(shell_cmd, "Build fabric-independent bitstream database", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id, fpga_bitstream_template<T>);
|
||||
|
||||
|
@ -101,7 +101,7 @@ ShellCommandId add_build_arch_bitstream_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_report_bitstream_distribution_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("report_bitstream_distribution");
|
||||
|
||||
/* Add an option '--file' */
|
||||
|
@ -125,7 +125,7 @@ ShellCommandId add_report_bitstream_distribution_command_template(
|
|||
|
||||
/* Add command 'report_bitstream_distribution' to the Shell */
|
||||
ShellCommandId shell_cmd_id =
|
||||
shell.add_command(shell_cmd, "Report bitstream distribution");
|
||||
shell.add_command(shell_cmd, "Report bitstream distribution", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
report_bitstream_distribution_template<T>);
|
||||
|
@ -144,7 +144,7 @@ ShellCommandId add_report_bitstream_distribution_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_build_fabric_bitstream_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("build_fabric_bitstream");
|
||||
|
||||
/* Add an option '--verbose' */
|
||||
|
@ -154,7 +154,7 @@ ShellCommandId add_build_fabric_bitstream_command_template(
|
|||
ShellCommandId shell_cmd_id =
|
||||
shell.add_command(shell_cmd,
|
||||
"Reorganize the fabric-independent bitstream for the "
|
||||
"FPGA fabric created by FPGA-Verilog");
|
||||
"FPGA fabric created by FPGA-Verilog", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
build_fabric_bitstream_template<T>);
|
||||
|
@ -173,7 +173,7 @@ ShellCommandId add_build_fabric_bitstream_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_fabric_bitstream_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_fabric_bitstream");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -208,7 +208,7 @@ ShellCommandId add_write_fabric_bitstream_command_template(
|
|||
|
||||
/* Add command 'fabric_bitstream' to the Shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd, "Write the fabric-dependent bitstream to a file");
|
||||
shell_cmd, "Write the fabric-dependent bitstream to a file", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
write_fabric_bitstream_template<T>);
|
||||
|
@ -227,7 +227,7 @@ ShellCommandId add_write_fabric_bitstream_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_io_mapping_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_io_mapping");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -245,7 +245,7 @@ ShellCommandId add_write_io_mapping_command_template(
|
|||
|
||||
/* Add command 'fabric_bitstream' to the Shell */
|
||||
ShellCommandId shell_cmd_id =
|
||||
shell.add_command(shell_cmd, "Write the I/O mapping information to a file");
|
||||
shell.add_command(shell_cmd, "Write the I/O mapping information to a file", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
write_io_mapping_template<T>);
|
||||
|
@ -260,7 +260,7 @@ ShellCommandId add_write_io_mapping_command_template(
|
|||
* Top-level function to add all the commands related to FPGA-Bitstream
|
||||
*******************************************************************/
|
||||
template <class T>
|
||||
void add_bitstream_command_templates(openfpga::Shell<T>& shell) {
|
||||
void add_bitstream_command_templates(openfpga::Shell<T>& shell, const bool& hidden = false) {
|
||||
/* Get the unique id of 'build_fabric' command which is to be used in creating
|
||||
* the dependency graph */
|
||||
const ShellCommandId& shell_cmd_build_fabric_id =
|
||||
|
@ -277,7 +277,7 @@ void add_bitstream_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> cmd_dependency_repack;
|
||||
cmd_dependency_repack.push_back(shell_cmd_build_fabric_id);
|
||||
ShellCommandId shell_cmd_repack_id = add_repack_command_template(
|
||||
shell, openfpga_bitstream_cmd_class, cmd_dependency_repack);
|
||||
shell, openfpga_bitstream_cmd_class, cmd_dependency_repack, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'build_architecture_bitstream'
|
||||
|
@ -288,7 +288,7 @@ void add_bitstream_command_templates(openfpga::Shell<T>& shell) {
|
|||
cmd_dependency_build_arch_bitstream.push_back(shell_cmd_repack_id);
|
||||
ShellCommandId shell_cmd_build_arch_bitstream_id =
|
||||
add_build_arch_bitstream_command_template(
|
||||
shell, openfpga_bitstream_cmd_class, cmd_dependency_build_arch_bitstream);
|
||||
shell, openfpga_bitstream_cmd_class, cmd_dependency_build_arch_bitstream, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'report_bitstream_distribution'
|
||||
|
@ -300,7 +300,7 @@ void add_bitstream_command_templates(openfpga::Shell<T>& shell) {
|
|||
shell_cmd_build_arch_bitstream_id);
|
||||
add_report_bitstream_distribution_command_template(
|
||||
shell, openfpga_bitstream_cmd_class,
|
||||
cmd_dependency_report_bitstream_distribution);
|
||||
cmd_dependency_report_bitstream_distribution, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'build_fabric_bitstream'
|
||||
|
@ -313,7 +313,7 @@ void add_bitstream_command_templates(openfpga::Shell<T>& shell) {
|
|||
ShellCommandId shell_cmd_build_fabric_bitstream_id =
|
||||
add_build_fabric_bitstream_command_template(
|
||||
shell, openfpga_bitstream_cmd_class,
|
||||
cmd_dependency_build_fabric_bitstream);
|
||||
cmd_dependency_build_fabric_bitstream, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_fabric_bitstream'
|
||||
|
@ -324,7 +324,7 @@ void add_bitstream_command_templates(openfpga::Shell<T>& shell) {
|
|||
cmd_dependency_write_fabric_bitstream.push_back(
|
||||
shell_cmd_build_fabric_bitstream_id);
|
||||
add_write_fabric_bitstream_command_template(
|
||||
shell, openfpga_bitstream_cmd_class, cmd_dependency_write_fabric_bitstream);
|
||||
shell, openfpga_bitstream_cmd_class, cmd_dependency_write_fabric_bitstream, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_io_mapping'
|
||||
|
@ -334,7 +334,7 @@ void add_bitstream_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> cmd_dependency_write_io_mapping;
|
||||
cmd_dependency_write_io_mapping.push_back(shell_cmd_build_fabric_id);
|
||||
add_write_io_mapping_command_template(shell, openfpga_bitstream_cmd_class,
|
||||
cmd_dependency_write_io_mapping);
|
||||
cmd_dependency_write_io_mapping, hidden);
|
||||
}
|
||||
|
||||
} /* end namespace openfpga */
|
||||
|
|
|
@ -20,7 +20,7 @@ namespace openfpga {
|
|||
template <class T>
|
||||
ShellCommandId add_write_pnr_sdc_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_pnr_sdc");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -100,7 +100,7 @@ ShellCommandId add_write_pnr_sdc_command_template(
|
|||
/* Add command 'write_fabric_verilog' to the Shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd,
|
||||
"generate SDC files to constrain the backend flow for FPGA fabric");
|
||||
"generate SDC files to constrain the backend flow for FPGA fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_const_execute_function(shell_cmd_id,
|
||||
write_pnr_sdc_template<T>);
|
||||
|
@ -120,7 +120,7 @@ ShellCommandId add_write_pnr_sdc_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_configuration_chain_sdc_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_configuration_chain_sdc");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -152,7 +152,7 @@ ShellCommandId add_write_configuration_chain_sdc_command_template(
|
|||
/* Add command 'write_configuration_chain_sdc' to the Shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd,
|
||||
"generate SDC files to constrain the configuration chain for FPGA fabric");
|
||||
"generate SDC files to constrain the configuration chain for FPGA fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_const_execute_function(
|
||||
shell_cmd_id, write_configuration_chain_sdc_template<T>);
|
||||
|
@ -171,7 +171,7 @@ ShellCommandId add_write_configuration_chain_sdc_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_sdc_disable_timing_configure_ports_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_sdc_disable_timing_configure_ports");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -195,7 +195,7 @@ ShellCommandId add_write_sdc_disable_timing_configure_ports_command_template(
|
|||
ShellCommandId shell_cmd_id =
|
||||
shell.add_command(shell_cmd,
|
||||
"generate SDC files to disable timing for configure "
|
||||
"ports across FPGA fabric");
|
||||
"ports across FPGA fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_const_execute_function(
|
||||
shell_cmd_id, write_sdc_disable_timing_configure_ports_template<T>);
|
||||
|
@ -214,7 +214,7 @@ ShellCommandId add_write_sdc_disable_timing_configure_ports_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_analysis_sdc_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_analysis_sdc");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -244,7 +244,7 @@ ShellCommandId add_write_analysis_sdc_command_template(
|
|||
ShellCommandId shell_cmd_id =
|
||||
shell.add_command(shell_cmd,
|
||||
"generate SDC files for timing analysis a PnRed FPGA "
|
||||
"fabric mapped by a benchmark");
|
||||
"fabric mapped by a benchmark", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_const_execute_function(shell_cmd_id,
|
||||
write_analysis_sdc_template<T>);
|
||||
|
@ -256,7 +256,7 @@ ShellCommandId add_write_analysis_sdc_command_template(
|
|||
}
|
||||
|
||||
template <class T>
|
||||
void add_openfpga_sdc_command_templates(openfpga::Shell<T>& shell) {
|
||||
void add_openfpga_sdc_command_templates(openfpga::Shell<T>& shell, const bool& hidden = false) {
|
||||
/* Get the unique id of 'build_fabric' command which is to be used in creating
|
||||
* the dependency graph */
|
||||
const ShellCommandId& build_fabric_id =
|
||||
|
@ -273,7 +273,7 @@ void add_openfpga_sdc_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> pnr_sdc_cmd_dependency;
|
||||
pnr_sdc_cmd_dependency.push_back(build_fabric_id);
|
||||
add_write_pnr_sdc_command_template<T>(shell, openfpga_sdc_cmd_class,
|
||||
pnr_sdc_cmd_dependency);
|
||||
pnr_sdc_cmd_dependency, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_configuration_chain_sdc'
|
||||
|
@ -283,7 +283,7 @@ void add_openfpga_sdc_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> cc_sdc_cmd_dependency;
|
||||
cc_sdc_cmd_dependency.push_back(build_fabric_id);
|
||||
add_write_configuration_chain_sdc_command_template<T>(
|
||||
shell, openfpga_sdc_cmd_class, cc_sdc_cmd_dependency);
|
||||
shell, openfpga_sdc_cmd_class, cc_sdc_cmd_dependency, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_sdc_disable_timing_configure_ports'
|
||||
|
@ -293,7 +293,7 @@ void add_openfpga_sdc_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> config_port_sdc_cmd_dependency;
|
||||
config_port_sdc_cmd_dependency.push_back(build_fabric_id);
|
||||
add_write_sdc_disable_timing_configure_ports_command_template<T>(
|
||||
shell, openfpga_sdc_cmd_class, config_port_sdc_cmd_dependency);
|
||||
shell, openfpga_sdc_cmd_class, config_port_sdc_cmd_dependency, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_analysis_sdc'
|
||||
|
@ -303,7 +303,7 @@ void add_openfpga_sdc_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> analysis_sdc_cmd_dependency;
|
||||
analysis_sdc_cmd_dependency.push_back(build_fabric_id);
|
||||
add_write_analysis_sdc_command_template<T>(shell, openfpga_sdc_cmd_class,
|
||||
analysis_sdc_cmd_dependency);
|
||||
analysis_sdc_cmd_dependency, hidden);
|
||||
}
|
||||
|
||||
} /* end namespace openfpga */
|
||||
|
|
|
@ -38,7 +38,7 @@ namespace openfpga {
|
|||
template <class T>
|
||||
ShellCommandId add_write_fabric_spice_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_fabric_spice");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -56,7 +56,7 @@ ShellCommandId add_write_fabric_spice_command_template(
|
|||
|
||||
/* Add command 'write_fabric_spice' to the Shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd, "generate SPICE netlists modeling full FPGA fabric");
|
||||
shell_cmd, "generate SPICE netlists modeling full FPGA fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
write_fabric_spice_template<T>);
|
||||
|
@ -68,7 +68,7 @@ ShellCommandId add_write_fabric_spice_command_template(
|
|||
}
|
||||
|
||||
template <class T>
|
||||
void add_spice_command_templates(openfpga::Shell<T>& shell) {
|
||||
void add_spice_command_templates(openfpga::Shell<T>& shell, const bool& hidden = false) {
|
||||
/* Get the unique id of 'build_fabric' command which is to be used in creating
|
||||
* the dependency graph */
|
||||
const ShellCommandId& build_fabric_cmd_id =
|
||||
|
@ -86,7 +86,7 @@ void add_spice_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> fabric_spice_dependent_cmds;
|
||||
fabric_spice_dependent_cmds.push_back(build_fabric_cmd_id);
|
||||
add_write_fabric_spice_command_template<T>(shell, openfpga_spice_cmd_class,
|
||||
fabric_spice_dependent_cmds);
|
||||
fabric_spice_dependent_cmds, hidden);
|
||||
|
||||
/********************************
|
||||
* TODO: Command 'write_spice_top_testbench'
|
||||
|
|
|
@ -21,7 +21,7 @@ namespace openfpga {
|
|||
template <class T>
|
||||
ShellCommandId add_write_fabric_verilog_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_fabric_verilog");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -64,7 +64,7 @@ ShellCommandId add_write_fabric_verilog_command_template(
|
|||
|
||||
/* Add command 'write_fabric_verilog' to the Shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd, "generate Verilog netlists modeling full FPGA fabric");
|
||||
shell_cmd, "generate Verilog netlists modeling full FPGA fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
write_fabric_verilog_template<T>);
|
||||
|
@ -83,7 +83,7 @@ ShellCommandId add_write_fabric_verilog_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_full_testbench_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_full_testbench");
|
||||
|
||||
/* add an option '--file' in short '-f'*/
|
||||
|
@ -162,7 +162,7 @@ ShellCommandId add_write_full_testbench_command_template(
|
|||
|
||||
/* add command to the shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd, "generate full testbenches for an fpga fabric");
|
||||
shell_cmd, "generate full testbenches for an fpga fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
write_full_testbench_template<T>);
|
||||
|
@ -181,7 +181,7 @@ ShellCommandId add_write_full_testbench_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_preconfigured_fabric_wrapper_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_preconfigured_fabric_wrapper");
|
||||
|
||||
/* add an option '--file' in short '-f'*/
|
||||
|
@ -240,7 +240,7 @@ ShellCommandId add_write_preconfigured_fabric_wrapper_command_template(
|
|||
|
||||
/* add command to the shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd, "generate a wrapper for a pre-configured fpga fabric");
|
||||
shell_cmd, "generate a wrapper for a pre-configured fpga fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(
|
||||
shell_cmd_id, write_preconfigured_fabric_wrapper_template<T>);
|
||||
|
@ -259,7 +259,7 @@ ShellCommandId add_write_preconfigured_fabric_wrapper_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_preconfigured_testbench_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_preconfigured_testbench");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -319,7 +319,7 @@ ShellCommandId add_write_preconfigured_testbench_command_template(
|
|||
|
||||
/* Add command to the Shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd, "generate testbenches for a preconfigured FPGA fabric");
|
||||
shell_cmd, "generate testbenches for a preconfigured FPGA fabric", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
write_preconfigured_testbench_template<T>);
|
||||
|
@ -338,7 +338,7 @@ ShellCommandId add_write_preconfigured_testbench_command_template(
|
|||
template <class T>
|
||||
ShellCommandId add_write_simulation_task_info_command_template(
|
||||
openfpga::Shell<T>& shell, const ShellCommandClassId& cmd_class_id,
|
||||
const std::vector<ShellCommandId>& dependent_cmds) {
|
||||
const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
|
||||
Command shell_cmd("write_simulation_task_info");
|
||||
|
||||
/* Add an option '--file' in short '-f'*/
|
||||
|
@ -380,7 +380,7 @@ ShellCommandId add_write_simulation_task_info_command_template(
|
|||
|
||||
/* Add command to the Shell */
|
||||
ShellCommandId shell_cmd_id = shell.add_command(
|
||||
shell_cmd, "generate an interchangable simulation task configuration file");
|
||||
shell_cmd, "generate an interchangable simulation task configuration file", hidden);
|
||||
shell.set_command_class(shell_cmd_id, cmd_class_id);
|
||||
shell.set_command_execute_function(shell_cmd_id,
|
||||
write_simulation_task_info_template<T>);
|
||||
|
@ -392,7 +392,7 @@ ShellCommandId add_write_simulation_task_info_command_template(
|
|||
}
|
||||
|
||||
template <class T>
|
||||
void add_verilog_command_templates(openfpga::Shell<T>& shell) {
|
||||
void add_verilog_command_templates(openfpga::Shell<T>& shell, const bool& hidden = false) {
|
||||
/* Get the unique id of 'build_fabric' command which is to be used in creating
|
||||
* the dependency graph */
|
||||
const ShellCommandId& build_fabric_cmd_id =
|
||||
|
@ -410,7 +410,7 @@ void add_verilog_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> fabric_verilog_dependent_cmds;
|
||||
fabric_verilog_dependent_cmds.push_back(build_fabric_cmd_id);
|
||||
add_write_fabric_verilog_command_template<T>(
|
||||
shell, openfpga_verilog_cmd_class, fabric_verilog_dependent_cmds);
|
||||
shell, openfpga_verilog_cmd_class, fabric_verilog_dependent_cmds, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_full_testbench'
|
||||
|
@ -420,7 +420,7 @@ void add_verilog_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> full_testbench_dependent_cmds;
|
||||
full_testbench_dependent_cmds.push_back(build_fabric_cmd_id);
|
||||
add_write_full_testbench_command_template<T>(
|
||||
shell, openfpga_verilog_cmd_class, full_testbench_dependent_cmds);
|
||||
shell, openfpga_verilog_cmd_class, full_testbench_dependent_cmds, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_preconfigured_fabric_wrapper'
|
||||
|
@ -430,7 +430,7 @@ void add_verilog_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> preconfig_wrapper_dependent_cmds;
|
||||
preconfig_wrapper_dependent_cmds.push_back(build_fabric_cmd_id);
|
||||
add_write_preconfigured_fabric_wrapper_command_template<T>(
|
||||
shell, openfpga_verilog_cmd_class, preconfig_wrapper_dependent_cmds);
|
||||
shell, openfpga_verilog_cmd_class, preconfig_wrapper_dependent_cmds, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_preconfigured_testbench'
|
||||
|
@ -440,7 +440,7 @@ void add_verilog_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> preconfig_testbench_dependent_cmds;
|
||||
preconfig_testbench_dependent_cmds.push_back(build_fabric_cmd_id);
|
||||
add_write_preconfigured_testbench_command_template<T>(
|
||||
shell, openfpga_verilog_cmd_class, preconfig_testbench_dependent_cmds);
|
||||
shell, openfpga_verilog_cmd_class, preconfig_testbench_dependent_cmds, hidden);
|
||||
|
||||
/********************************
|
||||
* Command 'write_simulation_task_info'
|
||||
|
@ -450,7 +450,7 @@ void add_verilog_command_templates(openfpga::Shell<T>& shell) {
|
|||
std::vector<ShellCommandId> sim_task_info_dependent_cmds;
|
||||
sim_task_info_dependent_cmds.push_back(build_fabric_cmd_id);
|
||||
add_write_simulation_task_info_command_template<T>(
|
||||
shell, openfpga_verilog_cmd_class, sim_task_info_dependent_cmds);
|
||||
shell, openfpga_verilog_cmd_class, sim_task_info_dependent_cmds, hidden);
|
||||
}
|
||||
|
||||
} /* end namespace openfpga */
|
||||
|
|
Loading…
Reference in New Issue