Commit Graph

  • f839b842a2 Fixed handling of undef values in POS cells in ConstEval Clifford Wolf 2013-11-06 18:45:31 +0100
  • 204572d926 Fixed handling of undef values in MUX select input in ConstEval Clifford Wolf 2013-11-06 14:12:44 +0100
  • 031a91dc94 Added correct RTL undef handling to eval vloghammer mode Clifford Wolf 2013-11-06 13:16:47 +0100
  • f94266bb42 Added eval -vloghammer_report mode Clifford Wolf 2013-11-06 04:14:56 +0100
  • 1d34fd7608 Added support for "keep" attributes on wires Clifford Wolf 2013-11-05 15:52:29 +0100
  • 27fec4e77c Fixed sign handling in const eval of sshl and sshr Clifford Wolf 2013-11-05 10:22:22 +0100
  • 2b5f4d1df3 Makefile DESTDIR default (/usr/local) without quotes Clifford Wolf 2013-11-04 21:30:57 +0100
  • f2786df146 Another fix for early width and sign detection in ast simplifier Clifford Wolf 2013-11-04 21:29:36 +0100
  • 31ddf7b9d4 Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2013-11-04 16:51:13 +0100
  • d38c67f53d Fixed const folding of ternary operator Clifford Wolf 2013-11-04 16:46:14 +0100
  • 8d226da694 Use proper bit width ans sign extension for const folding Clifford Wolf 2013-11-04 15:37:09 +0100
  • f830666ec0 Merge pull request #16 from mschmoelzer/master Clifford Wolf 2013-11-04 04:35:35 -0800
  • 58cfce6c5a Allow setting of installation destination via DESTDIR variable in Makefile Martin Schmölzer 2013-11-04 11:15:15 +0100
  • ba305a7ca6 Improved comments on topological sort in edif backend Clifford Wolf 2013-11-04 08:34:15 +0100
  • 1325514d33 Fixes for early width and sign detection in ast simplifier Clifford Wolf 2013-11-04 08:28:13 +0100
  • 472117d532 further improved early width and sign detection in ast simplifier Clifford Wolf 2013-11-04 06:04:42 +0100
  • cd0fe7d786 Added simple topological sort to edif backend Clifford Wolf 2013-11-03 22:01:32 +0100
  • 1dcb683fcb Write yosys version to output files Clifford Wolf 2013-11-03 21:41:39 +0100
  • eab536a203 Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2013-11-03 21:13:21 +0100
  • d2b083f5cb Fixed detectSignWidthWorker (ast frontend) for AST_CONCAT Clifford Wolf 2013-11-03 18:56:45 +0100
  • f7f0af6f9c Added resolution of positional arguments to hierarchy pass Clifford Wolf 2013-11-03 09:42:51 +0100
  • 4a60e5842d Ignore explicit unconnected ports in intersynth backend Clifford Wolf 2013-11-03 09:00:51 +0100
  • ada80545fa Behavior should be identical now to rev. 0b4a64ac6a (next: testing before constfold fixes) Clifford Wolf 2013-11-02 21:13:01 +0100
  • f912e029de Added roadmap to readme file Clifford Wolf 2013-11-02 13:19:04 +0100
  • 943329c1dc Various ast changes for early expression width detection (prep for constfold fixes) Clifford Wolf 2013-11-02 13:00:17 +0100
  • 0b4a64ac6a Added DFFSR cell to techlibs/cmos/cmos_cells.lib Clifford Wolf 2013-10-31 12:27:35 +0100
  • 0efe16f118 Added placeholder check to dfflibmap and cleaned up some other placeholder checks Clifford Wolf 2013-10-31 12:27:07 +0100
  • 961eaa0077 Changed MiniSAT feater defines again Clifford Wolf 2013-10-31 12:02:18 +0100
  • d78a9dfb37 Added paragraph to README file to avoid mycells.lib confusion Clifford Wolf 2013-10-31 11:15:00 +0100
  • f024b19ed9 README file typo fix Clifford Wolf 2013-10-31 01:15:07 +0100
  • cc7986a3e5 Some additions to the README file Clifford Wolf 2013-10-31 01:09:24 +0100
  • 3fc6c9aac6 Fixed ezminisat C++ errors: undef PRIi64 Clifford Wolf 2013-10-30 17:25:39 +0100
  • b8bfa020fa Added detection for endless recursion in fsm_detect pass Clifford Wolf 2013-10-30 00:47:58 +0100
  • 888c43210b Fixed help message typo (memory pass) Clifford Wolf 2013-10-30 00:47:31 +0100
  • 613750155d Added -format option to splitnets Clifford Wolf 2013-10-29 11:01:04 +0100
  • 6bfeb17f05 Merge pull request #12 from jameswalmsley/master Clifford Wolf 2013-10-27 14:35:15 -0700
  • 40b3551b45 [EXAMPLES] Ported the mojo counter example to Zynq ZED board. James Walmsley 2013-10-27 21:48:39 +0100
  • f39c0c9928 Fixed get_share_file_name() for installed yosys Clifford Wolf 2013-10-27 10:05:19 +0100
  • 88cd2eadf5 Cleanups in xilinx examples Clifford Wolf 2013-10-27 09:52:00 +0100
  • 4a3669d871 Added synth_xilinx command Clifford Wolf 2013-10-27 09:33:47 +0100
  • 73e68fe323 Added API and Makefile rules for share/ files Clifford Wolf 2013-10-27 09:33:26 +0100
  • bd2c8ec886 Added design->full_selection() helper method Clifford Wolf 2013-10-27 09:30:58 +0100
  • 90b016716b Moved simple xilinx counter sim example to subdir Clifford Wolf 2013-10-27 09:30:17 +0100
  • 02f321b6fc Xilinx mojo_counter example is now working Clifford Wolf 2013-10-27 08:21:56 +0100
  • d9fa1e5a1d Fixed hex string generation bug in edif backend Clifford Wolf 2013-10-27 08:21:05 +0100
  • d635f8adaa Renamed techlibs/xilinx7 to techlibs/xilinx Clifford Wolf 2013-10-26 22:29:40 +0200
  • 4007b41d40 Improved xilinx mojo_counter example Clifford Wolf 2013-10-26 22:28:42 +0200
  • ceb971eab9 Added support for i/o buffers to iopadmap Clifford Wolf 2013-10-26 22:27:40 +0200
  • b934a2d209 Added another xilinx example (not funcional yet) Clifford Wolf 2013-10-26 17:22:29 +0200
  • dd56004fc0 Added support for sr flip-flops to dfflibmap Clifford Wolf 2013-10-24 18:20:06 +0200
  • 628b994cf6 Added support for complex set-reset flip-flops in proc_dff Clifford Wolf 2013-10-24 16:54:05 +0200
  • e679a5d046 Fixed handling of boolean attributes (passes) Clifford Wolf 2013-10-24 11:37:54 +0200
  • e9dede01ca Fixed handling of boolean attributes (backends) Clifford Wolf 2013-10-24 11:27:30 +0200
  • 23cf23418c Fixed handling of boolean attributes (frontends) Clifford Wolf 2013-10-24 11:20:13 +0200
  • eae43e2db4 Fixed handling of boolean attributes (kernel) Clifford Wolf 2013-10-24 10:59:27 +0200
  • 77726fb5fe Fixed parsing of value-less attributes in ilang Clifford Wolf 2013-10-23 18:38:31 +0200
  • d61699843f Improved handling of dff with async resets Clifford Wolf 2013-10-21 14:51:58 +0200
  • 56ea230676 Added handling of multiple async paths in proc_arst Clifford Wolf 2013-10-19 00:50:13 +0200
  • 8e8f1994b8 Changed NEW_WIRE API to return the wire, not the signal Clifford Wolf 2013-10-18 14:19:45 +0200
  • bfa1a65fa9 Added dffsr support to proc_dff pass Clifford Wolf 2013-10-18 13:26:52 +0200
  • cc5e379eca Added RTLIL NEW_WIRE macro Clifford Wolf 2013-10-18 13:25:24 +0200
  • 0836a1f2ba Bugfix in dffsr techmap rules Clifford Wolf 2013-10-18 13:24:44 +0200
  • 8197169f8d Added techmap rules for $sr, $dffsr and $dlatch Clifford Wolf 2013-10-18 12:29:21 +0200
  • e0f693cbb0 Added $_SR_[PN][PN]_, $_DFFSR_[PN][PN][PN]_, $_DLATCH_[PN]_ Clifford Wolf 2013-10-18 12:13:34 +0200
  • 5998c101a4 Added $sr, $dffsr and $dlatch cell types Clifford Wolf 2013-10-18 11:56:16 +0200
  • 9bc703b964 Improved way of connecting ports in techmap pass Clifford Wolf 2013-10-17 22:19:38 +0200
  • 8cc53ef72c Only prefer connected signals iff they have public names Clifford Wolf 2013-10-17 22:10:55 +0200
  • 30b0de006f Added -buf, -true and -false options to blif backend Clifford Wolf 2013-10-17 21:37:18 +0200
  • 95dbacefbf Fixed bug in synthesis of memories that are never written Clifford Wolf 2013-10-17 21:00:37 +0200
  • c20571ca5e Avoid re-arranging signals on register outputs Clifford Wolf 2013-10-17 20:48:40 +0200
  • f5c0ed6c79 Fixed detection of major wires in opt_clean Clifford Wolf 2013-10-17 02:41:59 +0200
  • 96e7abad48 Added iopadmap pass Clifford Wolf 2013-10-16 16:16:06 +0200
  • b6db2d9b33 Moved dfflibmap from passes/dfflibmap to passes/techmap Clifford Wolf 2013-10-16 15:32:26 +0200
  • 5745d3de9a Added map, par and bitgen to xlinx7 example Clifford Wolf 2013-10-16 10:57:18 +0200
  • 845590aa8e Fixed parsing or liberty file statements such as 'clocked_on : "(!CLK)";' Patch by Tim Edwards Clifford Wolf 2013-10-16 06:32:35 +0200
  • a12d39bc86 Added recommended apt-get commands to README Clifford Wolf 2013-10-11 22:25:23 +0200
  • a97520785a Fixed minisat include Clifford Wolf 2013-10-11 21:17:01 +0200
  • 02efafa7f1 Pinned ABC revision to 0f9e5488ced3 Clifford Wolf 2013-10-03 16:03:30 +0200
  • 5dce6379aa Improvements in EDIF backend Clifford Wolf 2013-09-17 13:07:12 +0200
  • dc767d4e4c Added additional options to BLIF backend Clifford Wolf 2013-09-15 13:33:33 +0200
  • 0ec5542ab4 Added BLIF backend Clifford Wolf 2013-09-15 13:13:01 +0200
  • 28069e8a10 A couple of small fixes in SPICE backend Clifford Wolf 2013-09-15 12:19:06 +0200
  • 288ba9618a Moved common techlib files to techlibs/common Clifford Wolf 2013-09-15 11:52:57 +0200
  • 647c23b7b7 Updated manual Clifford Wolf 2013-09-15 11:41:05 +0200
  • 2c9bd23801 Added spice testbench to techlibs/cmos Clifford Wolf 2013-09-14 13:29:11 +0200
  • bbe5aa446b Added spice backend Clifford Wolf 2013-09-14 11:23:45 +0200
  • 70476e2431 Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2013-09-03 19:10:25 +0200
  • 73914d1a41 Added -selected option to various backends Clifford Wolf 2013-09-03 19:10:11 +0200
  • 09e200797a Encode large (>32 bits) parameters as hex string in edif backend Clifford Wolf 2013-08-28 08:48:49 +0200
  • 2feee7415d Improved edif backend Clifford Wolf 2013-08-27 14:22:11 +0200
  • 6685ad436e Added mapping to techlibs/xilinx7 testbench (exposes EDIF backend todos) Clifford Wolf 2013-08-27 13:12:26 +0200
  • 5059b31660 Added simple xilinx7 technology mapping files Clifford Wolf 2013-08-22 20:26:19 +0200
  • 39ee561169 More explicit integer output in verilog backend Clifford Wolf 2013-08-22 20:22:19 +0200
  • 4f4cb2307f Added correct encoding of identifiers in EDIF backend Clifford Wolf 2013-08-22 14:30:33 +0200
  • aba8639a3f Added edif backend (still under construction) Clifford Wolf 2013-08-22 11:34:55 +0200
  • 8409956c0c Merge pull request #10 from hansiglaser/master Clifford Wolf 2013-08-21 09:47:06 -0700
  • 93f7ff820a Merge f352205635 into f8107ab7fc Johann Glaser 2013-08-21 09:46:32 -0700
  • f8107ab7fc Some minor documentation fixes Clifford Wolf 2013-08-21 12:16:44 +0200
  • f352205635 fixed Verilog parser filename and line numbering issue with include files Johann Glaser 2013-08-21 09:20:59 +0200
  • 459e8964fd Merge pull request #9 from hansiglaser/master Clifford Wolf 2013-08-20 09:38:31 -0700