Eddie Hung
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3d9737c1bd
|
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
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2020-01-21 16:27:40 -08:00 |
Eddie Hung
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cd8f55a911
|
write_xaiger: fix for (* keep *) on flop output
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2020-01-21 09:43:04 -08:00 |
Claire Wolf
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30642e9570
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Merge pull request #1629 from YosysHQ/mwk/edif-z
edif: Just ignore connections to 'z
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2020-01-21 18:35:15 +01:00 |
Eddie Hung
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38aa248385
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Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
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2020-01-15 11:26:11 -08:00 |
Eddie Hung
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d6da9c0c0f
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write_xaiger: skip abc9_flop only if abc_box_seq present
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2020-01-15 11:25:20 -08:00 |
Eddie Hung
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485e08e436
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abc9_ops: cope with (* abc9_flop *) in place of (* abc9_box_id *)
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2020-01-14 16:33:41 -08:00 |
Eddie Hung
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48984a7605
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Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
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2020-01-14 16:32:46 -08:00 |
Eddie Hung
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1c41dc6b95
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write_xaiger: do not export flop inputs as POs
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2020-01-14 16:17:27 -08:00 |
Eddie Hung
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0e4285ca0d
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abc9_ops: generate flop box ids, add abc9_required to FD* cells
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2020-01-14 15:05:49 -08:00 |
Eddie Hung
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588a713b54
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Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
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2020-01-14 14:28:07 -08:00 |
Eddie Hung
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4656f202c6
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abc9_ops: -reintegrate to not trim box padding anymore
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2020-01-14 14:27:29 -08:00 |
Eddie Hung
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aaafd784a5
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write_xaiger: skip if no arrival times
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2020-01-14 13:05:39 -08:00 |
Eddie Hung
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915e7dde73
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Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
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2020-01-14 12:57:56 -08:00 |
Eddie Hung
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654247abe9
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abc9_ops/write_xaiger: update doc
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2020-01-14 12:40:36 -08:00 |
Eddie Hung
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468386d67d
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abc9_ops: -prep_holes -> -prep_xaiger, move padding to write_xaiger
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2020-01-14 12:25:45 -08:00 |
Eddie Hung
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53a99ade9c
|
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
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2020-01-14 11:46:56 -08:00 |
Miodrag Milanović
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9fbeb57bbd
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Merge pull request #1623 from YosysHQ/mmicko/edif_attr
Export wire properties in EDIF
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2020-01-14 19:19:32 +01:00 |
Eddie Hung
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eb7dd7d374
|
write_xaiger: fix case of PI and CI and (* keep *)
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2020-01-13 23:23:21 -08:00 |
Eddie Hung
|
2c65e1abac
|
abc9: break SCC by setting (* keep *) on output wires
|
2020-01-13 21:45:27 -08:00 |
Eddie Hung
|
a6d4ea7463
|
abc9: respect (* keep *) on cells
|
2020-01-13 19:21:11 -08:00 |
Eddie Hung
|
9ec948f396
|
write_xaiger: add support and test for (* keep *) on wires
|
2020-01-13 19:07:55 -08:00 |
Eddie Hung
|
0d2c06ee47
|
write_xaiger: cache arrival times
|
2020-01-13 09:50:50 -08:00 |
Marcin Kościelnicki
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55f86eda36
|
edif: Just ignore connections to 'z
Connecting a const 'z to a net should be equivalent to not connecting it
at all, so let's just ignore such connections on output.
|
2020-01-13 14:49:31 +01:00 |
Eddie Hung
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f9aae90e7a
|
Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
|
2020-01-12 15:19:41 -08:00 |
Eddie Hung
|
295e241c07
|
cleanup
|
2020-01-11 17:28:24 -08:00 |
Eddie Hung
|
79db12f238
|
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
|
2020-01-11 17:26:25 -08:00 |
Eddie Hung
|
58ab9f6021
|
write_xaiger: create holes_sigmap before modifications
|
2020-01-11 17:25:32 -08:00 |
Eddie Hung
|
1ccee4b95e
|
write_xaiger: sort holes by offset as well as port_id
|
2020-01-11 11:49:57 -08:00 |
Eddie Hung
|
f24de88f38
|
log_debug() for abc9_{arrival,required} times
|
2020-01-10 17:13:27 -08:00 |
Miodrag Milanovic
|
6888799c75
|
remove whitespace
|
2020-01-10 12:38:03 +01:00 |
Miodrag Milanovic
|
2bcd55f1ae
|
Export wire properties as well in EDIF
|
2020-01-10 12:33:58 +01:00 |
Eddie Hung
|
ceabd5bc39
|
write_xaiger: cleanup
|
2020-01-09 14:03:43 -08:00 |
Eddie Hung
|
3177437224
|
write_xaiger: cope with abc9_arrival as string of ints
|
2020-01-09 10:05:03 -08:00 |
Eddie Hung
|
7532416cd7
|
write_xaiger: cleanup holes generation
|
2020-01-08 18:27:09 -08:00 |
Eddie Hung
|
5f7349f26d
|
write_xaiger: holes PIs only if whitebox
|
2020-01-08 15:40:37 -08:00 |
Eddie Hung
|
8d0cc654a4
|
Stray log_module
|
2020-01-06 15:14:38 -08:00 |
Eddie Hung
|
aa58472a29
|
Revert "write_xaiger to pad, not abc9_ops -prep_holes"
This reverts commit b5f60e055d .
|
2020-01-06 13:34:45 -08:00 |
Eddie Hung
|
921ff0f5e3
|
Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor
|
2020-01-06 12:04:08 -08:00 |
Eddie Hung
|
886c5c5883
|
write_xaiger: make more robust, update doc
|
2020-01-06 10:23:04 -08:00 |
Eddie Hung
|
19ec54f956
|
write_aiger: make more robust
|
2020-01-06 10:18:59 -08:00 |
Eddie Hung
|
b5f60e055d
|
write_xaiger to pad, not abc9_ops -prep_holes
|
2020-01-05 10:20:24 -08:00 |
Eddie Hung
|
6556a1347a
|
Fix when -dff not given
|
2020-01-04 09:17:01 -08:00 |
Eddie Hung
|
930f03e883
|
Call -prep_holes before aigmap; fix topo ordering
|
2020-01-03 15:38:18 -08:00 |
Eddie Hung
|
a819656972
|
WIP
|
2020-01-03 14:59:55 -08:00 |
Eddie Hung
|
559f3379e8
|
Preserve topo ordering from -prep_holes to write_xaiger
|
2020-01-03 14:37:58 -08:00 |
Eddie Hung
|
bb70915fb8
|
WIP
|
2020-01-03 13:21:56 -08:00 |
Eddie Hung
|
e1f494ab1d
|
WIP
|
2020-01-03 13:08:52 -08:00 |
Eddie Hung
|
e62eb02c1d
|
Restore write_xaiger's holes_mode since port_id order causes QoR
regressions inside abc9
|
2020-01-03 12:32:05 -08:00 |
Eddie Hung
|
dedea5a58d
|
Cleanup
|
2020-01-02 17:25:14 -08:00 |
Eddie Hung
|
c28bea0382
|
Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor
|
2020-01-02 15:57:35 -08:00 |
Eddie Hung
|
07feedfa73
|
write_xaiger: get rid of external_bits dict
|
2020-01-02 15:32:58 -08:00 |
Eddie Hung
|
8e507bd807
|
abc9 -keepff -> -dff; refactor dff operations
|
2020-01-02 12:36:54 -08:00 |
Eddie Hung
|
11577b46fc
|
Get rid of (* abc9_keep *) in write_xaiger too
|
2020-01-01 08:38:23 -08:00 |
Eddie Hung
|
ac808c5e2a
|
attributes.count() -> get_bool_attribute()
|
2020-01-01 08:33:32 -08:00 |
Eddie Hung
|
96db05aaef
|
parse_xaiger to not take box_lookup
|
2019-12-31 17:06:03 -08:00 |
Eddie Hung
|
cac7f5d82e
|
Do not re-order carry chain ports, just precompute iteration order
|
2019-12-31 16:12:40 -08:00 |
Eddie Hung
|
134e70e8e7
|
write_xaiger: be more precise with ff_bits, remove ff_aig_map
|
2019-12-31 10:21:11 -08:00 |
Eddie Hung
|
3798fa3bea
|
Retry getting rid of write_xaiger's holes_mode
|
2019-12-31 09:59:17 -08:00 |
Eddie Hung
|
436c96e2fb
|
Revert "Get rid of holes_mode"
This reverts commit 7997e2a90f .
|
2019-12-30 23:29:14 -08:00 |
Eddie Hung
|
7997e2a90f
|
Get rid of holes_mode
|
2019-12-30 20:15:09 -08:00 |
Eddie Hung
|
b42b64e8ed
|
Move Pass::call() out of abc9_ops into abc9
|
2019-12-30 19:23:54 -08:00 |
Eddie Hung
|
88334cab89
|
Cleanup
|
2019-12-30 18:49:33 -08:00 |
Eddie Hung
|
65baefecd3
|
Rid unnecessary if
|
2019-12-30 18:26:35 -08:00 |
Eddie Hung
|
e2bbe33a88
|
Get rid of holes_mode
|
2019-12-30 18:24:29 -08:00 |
Eddie Hung
|
b50de28c04
|
Add abc9_ops -prep_holes
|
2019-12-30 18:00:49 -08:00 |
Eddie Hung
|
0735572934
|
write_xaiger to use scratchpad for stats; cleanup abc9
|
2019-12-30 15:35:33 -08:00 |
Eddie Hung
|
d1fccd5a2d
|
Remove unused
|
2019-12-30 14:35:52 -08:00 |
Eddie Hung
|
3cbbae251f
|
Call "proc" if processes inside whiteboxes
|
2019-12-30 14:33:05 -08:00 |
Eddie Hung
|
405e974fe5
|
Merge remote-tracking branch 'origin/master' into xaig_dff
|
2019-12-30 14:31:42 -08:00 |
Eddie Hung
|
d7ada66497
|
Add "synth_xilinx -dff" option, cleanup abc9
|
2019-12-30 14:13:16 -08:00 |
Eddie Hung
|
237415e78c
|
write_xaiger: inherit port ordering from original module
|
2019-12-27 16:44:18 -08:00 |
Eddie Hung
|
a56d6970f2
|
Revert "Merge pull request #1598 from YosysHQ/revert-1588-eddie/xaiger_cleanup"
This reverts commit 92654f73ea , reversing
changes made to 3e14ff1667 .
|
2019-12-27 16:05:58 -08:00 |
Eddie Hung
|
9e6632c40a
|
Merge branch 'master' of github.com:YosysHQ/yosys
|
2019-12-27 15:37:26 -08:00 |
Eddie Hung
|
3d4644804e
|
write_xaiger: simplify c{i,o}_bits
|
2019-12-27 15:37:17 -08:00 |
David Shah
|
df31ade3b3
|
Revert "write_xaiger: only instantiate each whitebox cell type once"
|
2019-12-27 23:25:20 +00:00 |
Eddie Hung
|
dd503a5f3f
|
Really fix it!
|
2019-12-27 15:18:55 -08:00 |
Eddie Hung
|
49881b4468
|
write_xaiger: fix arrival times for non boxes
|
2019-12-27 11:30:18 -08:00 |
Eddie Hung
|
6eadd4390a
|
write_xaiger to opt instead of just clean whiteboxes
|
2019-12-23 08:35:53 -08:00 |
Eddie Hung
|
a75e08c709
|
write_xaiger: only instantiate each whitebox cell type once
|
2019-12-20 13:07:24 -08:00 |
Eddie Hung
|
10e82e103f
|
Revert "Optimise write_xaiger"
|
2019-12-20 12:05:45 -08:00 |
Eddie Hung
|
5f50e4f112
|
Cleanup xaiger, remove unnecessary complexity with inout
|
2019-12-17 15:45:26 -08:00 |
Eddie Hung
|
e82a9bc642
|
Do not sigmap
|
2019-12-17 00:03:03 -08:00 |
Eddie Hung
|
2e71130700
|
Revert "Use sigmap signal"
This reverts commit 42f990f3a6 .
|
2019-12-17 00:00:07 -08:00 |
Eddie Hung
|
42f990f3a6
|
Use sigmap signal
|
2019-12-16 16:49:42 -08:00 |
Eddie Hung
|
b19fc8839b
|
Skip $inout transformation if not a PI
|
2019-12-16 14:39:13 -08:00 |
Eddie Hung
|
78c0246d4a
|
Revert "write_xaiger: use sigmap bits more consistently"
This reverts commit 6c340112fe .
|
2019-12-16 14:35:35 -08:00 |
Eddie Hung
|
6c340112fe
|
write_xaiger: use sigmap bits more consistently
|
2019-12-16 10:21:57 -08:00 |
Eddie Hung
|
91467938c4
|
Stray newline
|
2019-12-06 17:08:19 -08:00 |
Eddie Hung
|
f2ac36de4a
|
write_xaiger to inst each cell type once, do not call techmap/aigmap
|
2019-12-06 17:06:10 -08:00 |
Eddie Hung
|
1f96de04c9
|
Fix writing non-whole modules, including inouts and keeps
|
2019-12-06 16:19:10 -08:00 |
Eddie Hung
|
a682a3cf93
|
write_xaiger to support part-selected modules again
|
2019-12-05 17:54:43 -08:00 |
Eddie Hung
|
c6ee2fb482
|
Cleanup
|
2019-12-03 19:21:47 -08:00 |
Eddie Hung
|
df52bc80d8
|
write_xaiger to consume abc9_init attribute for abc9_flops
|
2019-12-03 18:47:44 -08:00 |
Eddie Hung
|
419ca5c207
|
Revert "Fold loop"
This reverts commit a30d5e1cc3 .
|
2019-11-27 21:55:56 -08:00 |
Eddie Hung
|
449b1d2c6f
|
Add comment, use sigmap
|
2019-11-27 13:20:12 -08:00 |
Eddie Hung
|
403214f44d
|
Revert "Fold loop"
This reverts commit da51492dbc .
|
2019-11-27 12:35:25 -08:00 |
Eddie Hung
|
5e67df38ed
|
latch -> box
|
2019-11-26 22:59:05 -08:00 |
Eddie Hung
|
a30d5e1cc3
|
Fold loop
|
2019-11-26 21:57:50 -08:00 |
Eddie Hung
|
68717dd03b
|
Do not sigmap keep bits inside write_xaiger
|
2019-11-26 21:57:50 -08:00 |
Eddie Hung
|
7136cee6b4
|
xaiger: do not promote output wires
|
2019-11-26 21:55:37 -08:00 |