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write_xaiger: create holes_sigmap before modifications
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@ -771,6 +771,8 @@ struct XAigerWriter
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// created a new $paramod ...
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Pass::call_on_module(holes_module->design, holes_module, "flatten -wb; techmap; aigmap");
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SigMap holes_sigmap(holes_module);
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dict<SigSpec, SigSpec> replace;
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for (auto it = holes_module->cells_.begin(); it != holes_module->cells_.end(); ) {
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auto cell = it->second;
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@ -808,7 +810,6 @@ struct XAigerWriter
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++it;
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}
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SigMap holes_sigmap(holes_module);
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for (auto &conn : holes_module->connections_) {
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auto it = replace.find(sigmap(conn.second));
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if (it != replace.end())
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