Eddie Hung
41243a53b3
Update test with more accurate LUT mask
2019-07-12 21:00:59 -07:00
Clifford Wolf
9546ccdbd3
Fix tests/various/async FFL test
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-09 22:44:39 +02:00
Clifford Wolf
5138621482
Improve tests/various/async, disable failing ffl test
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-09 22:21:25 +02:00
Clifford Wolf
c18b23f055
Add tests/various/async.{sh,v}
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-09 20:58:59 +02:00
Clifford Wolf
3dd92fcd15
Improve tests/various/run-test.sh
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-09 20:58:28 +02:00
Eddie Hung
de26328130
Merge pull request #1156 from YosysHQ/eddie/fix_abc9_unknown_cell
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write_xaiger to treat unknown cell connections as keep-s
2019-07-03 09:43:00 -07:00
Clifford Wolf
e38b2ac648
Merge pull request #1147 from YosysHQ/clifford/fix1144
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Improve specify dummy parser
2019-07-03 12:30:37 +02:00
Clifford Wolf
1f173210eb
Fix tests/various/specify.v
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-03 11:25:05 +02:00
Clifford Wolf
ba36567908
Some cleanups in "ignore specify parser"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-03 11:22:10 +02:00
Eddie Hung
9c556e3c02
Add test
2019-07-02 19:13:40 -07:00
Eddie Hung
81a717e9b7
Update test for Pass::call_on_module()
2019-07-02 08:22:31 -07:00
Eddie Hung
90382a0f6d
Update test too
2019-07-02 08:19:23 -07:00
Eddie Hung
04459cb30a
Comment out invalid syntax
2019-06-30 11:48:01 -07:00
Eddie Hung
64f6b0c747
Try command in another module
2019-06-28 13:41:32 -07:00
Eddie Hung
2c6aaef3db
Add test
2019-06-28 13:32:09 -07:00
Eddie Hung
dc677c791d
Add test from #1144 , and try reading without '-specify' flag
2019-06-28 10:12:48 -07:00
Eddie Hung
440f173aef
Merge remote-tracking branch 'origin/master' into xaig
2019-06-27 11:54:34 -07:00
Eddie Hung
6c210e5813
Merge pull request #1143 from YosysHQ/clifford/fix1135
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Add "pmux2shiftx -norange"
2019-06-27 11:48:48 -07:00
Eddie Hung
6c256b8cda
Merge origin/master
2019-06-27 11:20:15 -07:00
Eddie Hung
18acb72c05
Add #1135 testcase
2019-06-27 11:02:52 -07:00
Eddie Hung
3910bc2ea6
Copy tests from eddie/fix1132
2019-06-27 06:01:50 -07:00
Eddie Hung
6f36ec8ecf
Merge remote-tracking branch 'origin/master' into xaig
2019-06-25 09:33:11 -07:00
Eddie Hung
9dca024a30
Add tests/various/abc9.{v,ys} with SCC test
2019-06-24 21:52:53 -07:00
Eddie Hung
4ddc0354c1
Merge remote-tracking branch 'origin/master' into eddie/muxpack
2019-06-22 14:40:55 -07:00
Eddie Hung
e01bab6c64
Merge pull request #1108 from YosysHQ/clifford/fix1091
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Add support for partial matches to muxcover
2019-06-21 17:13:41 -07:00
Eddie Hung
32f637ffdb
Add more tests
2019-06-21 12:31:04 -07:00
Eddie Hung
ae8305ffcc
Fix testcase
2019-06-21 12:13:00 -07:00
Eddie Hung
6ec8160981
Add more muxpack tests, with overlapping entries
2019-06-21 11:45:53 -07:00
Eddie Hung
63eb5cace9
Merge branch 'master' into eddie/muxpack
2019-06-21 11:17:19 -07:00
Eddie Hung
6d74cf0d2b
Merge pull request #1085 from YosysHQ/eddie/shregmap_improve
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Improve shregmap to handle case where first flop is common to two chains
2019-06-21 08:56:56 -07:00
Eddie Hung
844c42cef8
Missing a `clean` and `opt_expr -mux_bool` in test
2019-06-20 19:47:59 -07:00
Eddie Hung
75375a3fbc
Add test
2019-06-20 19:47:59 -07:00
Eddie Hung
d0bbf9e4d4
Extend sign extension tests
2019-06-20 12:43:59 -07:00
Eddie Hung
b77322034c
Remove leftover comment
2019-06-20 10:15:04 -07:00
Eddie Hung
b98276fa61
Add test
2019-06-20 10:13:52 -07:00
Clifford Wolf
a8c85d1b4b
Update some .gitignore files
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-20 14:27:57 +02:00
Eddie Hung
45c2a5f876
Add shregmap -tech xilinx test
2019-06-12 08:34:06 -07:00
Eddie Hung
c314ca3c51
Add test
2019-06-10 16:16:26 -07:00
Eddie Hung
58f4b106f3
Merge branch 'master' into eddie/muxpack
2019-06-07 15:47:28 -07:00
Eddie Hung
b959bf79c0
Add nonexcl case test, comment out two others
2019-06-07 15:35:15 -07:00
Eddie Hung
1da12c5071
Add @cliffordwolf freduce testcase
2019-06-07 12:12:11 -07:00
Eddie Hung
e263bc249b
Add nonexclusive test from @cliffordwolf
2019-06-07 11:54:29 -07:00
Eddie Hung
0f6e914ef6
Another muxpack test
2019-06-07 08:34:58 -07:00
Clifford Wolf
a3bbc5365b
Merge branch 'pr_elab_sys_tasks' of https://github.com/udif/yosys into clifford/pr983
2019-06-07 12:08:42 +02:00
Eddie Hung
5c277c6325
Fix and test for balanced case
2019-06-06 14:21:34 -07:00
Eddie Hung
0a66720f6f
Fix warnings
2019-06-06 14:01:42 -07:00
Eddie Hung
ccdf989025
Support cascading $pmux.A with $mux.A and $mux.B
2019-06-06 13:51:22 -07:00
Eddie Hung
705388eb24
Add non exclusive test
2019-06-06 12:44:06 -07:00
Eddie Hung
b8620f7b3d
One more and tidy up
2019-06-06 12:03:44 -07:00
Eddie Hung
5d4eca5a29
Add a few more special case tests
2019-06-06 11:59:41 -07:00
Eddie Hung
3e76e3a6fa
Add tests, fix for !=
2019-06-06 11:54:38 -07:00
Maciej Kurc
b79bd5b3ca
Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.
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Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-04 10:42:42 +02:00
Eddie Hung
f3e86e06e6
Fix init
2019-05-24 18:43:26 -07:00
Eddie Hung
e1cb1bb948
Fix typos
2019-05-24 18:34:27 -07:00
Eddie Hung
d15da4bc11
Add more tests
2019-05-24 18:33:18 -07:00
Eddie Hung
4bd9465ed3
Call proc
2019-05-24 18:32:02 -07:00
Eddie Hung
f0c6b73b72
Fix duplicate driver
2019-05-24 17:44:57 -07:00
Eddie Hung
47f9ea142f
Add opt_rmdff tests
2019-05-23 11:26:38 -07:00
Clifford Wolf
752553d8e9
Merge pull request #946 from YosysHQ/clifford/specify
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Add specify parser
2019-05-06 20:57:15 +02:00
Clifford Wolf
d97c644bc1
Add tests/various/chparam.sh
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 16:03:15 +02:00
Clifford Wolf
8c6e94d57c
Improve tests/various/specify.ys
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 12:26:15 +02:00
Eddie Hung
554c58715a
More testing
2019-05-03 15:54:25 -07:00
Eddie Hung
bfb8b3018b
Fix spacing
2019-05-03 15:42:02 -07:00
Eddie Hung
09841c2ac1
Add quick-and-dirty specify tests
2019-05-03 15:35:26 -07:00
Udi Finkelstein
ac10e7d96d
Initial implementation of elaboration system tasks
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(IEEE1800-2017 section 20.11)
This PR allows us to use $info/$warning/$error/$fatal **at elaboration time** within a generate block.
This is very useful to stop a synthesis of a parametrized block when an
illegal combination of parameters is chosen.
2019-05-03 03:10:43 +03:00
Clifford Wolf
a80e74dc20
Updaye pmux2shiftx test
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 16:17:43 +02:00
Clifford Wolf
a98b171814
Merge pull request #944 from YosysHQ/clifford/pmux2shiftx
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Add pmux2shiftx command
2019-04-22 08:39:37 +02:00
Clifford Wolf
d38f0c1a96
Fix tests
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-21 11:40:20 +02:00
Clifford Wolf
b3a3e08e38
Improve "pmux2shiftx"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 02:03:44 +02:00
Clifford Wolf
37728520a6
Improvements in "pmux2shiftx"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 01:15:48 +02:00
Clifford Wolf
0070184ea9
Improvements in pmux2shiftx
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 00:38:25 +02:00
Clifford Wolf
4c831d72ef
Add test for pmux2shiftx
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 00:38:25 +02:00
Eddie Hung
b3378745fd
Revert "Recognise default entry in case even if all cases covered (fix for #931 )"
2019-04-15 17:52:45 -07:00
Eddie Hung
7685469ee2
Add default entry to testcase
2019-04-11 15:03:40 -07:00
Jim Lawson
71bcc4c644
Address requested changes - don't require non-$ name.
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Suppress warning if name does begin with a `$`.
Fix hierachy tests so they have something to grep.
Announce hierarchy test types.
2019-02-22 16:06:10 -08:00
Jim Lawson
5c4a72c43e
Fix normal (non-array) hierarchy -auto-top.
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Add simple test.
2019-02-19 14:35:15 -08:00
Udi Finkelstein
73d426bc87
Modified errors into warnings
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No longer false warnings for memories and assertions
2018-06-05 18:03:22 +03:00
Udi Finkelstein
80d9d15f1c
reg_wire_error test needs the -sv flag so it is run via a script so it had to be moved out of the tests/simple dir that only runs Verilog files
2018-06-05 18:00:06 +03:00
Clifford Wolf
724cead61d
Added "pmuxtree" command
2015-04-07 20:27:10 +02:00
Clifford Wolf
01ef34c147
Added tests/various/constmsk_test.ys
2014-09-04 15:07:30 +02:00
Clifford Wolf
d49dec1f86
Added tests/various/.gitignore
2014-07-26 17:43:41 +02:00
Clifford Wolf
b21ebe1859
Added tests/various/submod_extract.ys
2014-07-26 17:22:18 +02:00