Initial implementation of elaboration system tasks

(IEEE1800-2017 section 20.11)
This PR allows us to use $info/$warning/$error/$fatal **at elaboration time** within a generate block.
This is very useful to stop a synthesis of a parametrized block when an
illegal combination of parameters is chosen.
This commit is contained in:
Udi Finkelstein 2019-05-03 03:10:43 +03:00
parent 98925f6c4b
commit ac10e7d96d
10 changed files with 107 additions and 5 deletions

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@ -154,6 +154,7 @@ std::string AST::type2str(AstNodeType type)
X(AST_GENIF)
X(AST_GENCASE)
X(AST_GENBLOCK)
X(AST_TECALL)
X(AST_POSEDGE)
X(AST_NEGEDGE)
X(AST_EDGE)

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@ -137,7 +137,8 @@ namespace AST
AST_GENIF,
AST_GENCASE,
AST_GENBLOCK,
AST_TECALL,
AST_POSEDGE,
AST_NEGEDGE,
AST_EDGE,
@ -233,6 +234,7 @@ namespace AST
bool mem2reg_check(pool<AstNode*> &mem2reg_set);
void mem2reg_remove(pool<AstNode*> &mem2reg_set, vector<AstNode*> &delnodes);
void meminfo(int &mem_width, int &mem_size, int &addr_bits);
bool check_elab_tasks(void);
// additional functionality for evaluating constant functions
struct varinfo_t { RTLIL::Const val; int offset; bool is_signed; };

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@ -856,6 +856,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
case AST_GENVAR:
case AST_GENFOR:
case AST_GENBLOCK:
case AST_TECALL:
case AST_GENIF:
case AST_GENCASE:
case AST_PACKAGE:

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@ -1146,7 +1146,8 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
if (type == AST_GENFOR) {
for (size_t i = 0; i < buf->children.size(); i++) {
buf->children[i]->simplify(false, false, false, stage, -1, false, false);
if (!buf->children[i]->check_elab_tasks())
buf->children[i]->simplify(false, false, false, stage, -1, false, false);
current_ast_mod->children.push_back(buf->children[i]);
}
} else {
@ -1261,7 +1262,8 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
}
for (size_t i = 0; i < buf->children.size(); i++) {
buf->children[i]->simplify(false, false, false, stage, -1, false, false);
if (!buf->children[i]->check_elab_tasks())
buf->children[i]->simplify(false, false, false, stage, -1, false, false);
current_ast_mod->children.push_back(buf->children[i]);
}
@ -1340,7 +1342,8 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
}
for (size_t i = 0; i < buf->children.size(); i++) {
buf->children[i]->simplify(false, false, false, stage, -1, false, false);
if (!buf->children[i]->check_elab_tasks())
buf->children[i]->simplify(false, false, false, stage, -1, false, false);
current_ast_mod->children.push_back(buf->children[i]);
}
@ -2969,6 +2972,44 @@ static void mark_memories_assign_lhs_complex(dict<AstNode*, pool<std::string>> &
}
}
// handle $info(), $warning(), $error(), $fatal()
// we don't do that in simplify() because we don't know
bool AstNode::check_elab_tasks(void)
{
if (type == AST_TECALL) {
int sz = children.size();
if (str == "$info") {
if (sz > 0)
log_file_info(filename, linenum, "%s.\n", children[0]->str.c_str());
else
log_file_info(filename, linenum, "\n");
} else if (str == "$warning") {
if (sz > 0)
log_file_warning(filename, linenum, "%s.\n", children[0]->str.c_str());
else
log_file_warning(filename, linenum, "\n");
} else if (str == "$error") {
if (sz > 0)
log_file_error(filename, linenum, "%s.\n", children[0]->str.c_str());
else
log_file_error(filename, linenum, "\n");
} else if (str == "$fatal") {
// TODO: 1st parameter, if exists, is 0,1 or 2, and passed to $finish()
// if no parameter is given, default value is 1
// dollar_finish(sz ? children[0] : 1);
// perhaps create & use log_file_fatal()
if (sz > 0)
log_file_error(filename, linenum, "FATAL: %s.\n", children[0]->str.c_str());
else
log_file_error(filename, linenum, "FATAL.\n");
} else {
log_file_error(filename, linenum, "Unknown elabortoon system task '%s'.\n", str.c_str());
}
return true;
}
return false;
}
// find memories that should be replaced by registers
void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg_places,
dict<AstNode*, uint32_t> &mem2reg_candidates, dict<AstNode*, uint32_t> &proc_flags, uint32_t &flags)

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@ -301,6 +301,11 @@ supply1 { return TOK_SUPPLY1; }
return TOK_ID;
}
"$"(info|warning|error|fatal) {
frontend_verilog_yylval.string = new std::string(yytext);
return TOK_ELAB_TASK;
}
"$signed" { return TOK_TO_SIGNED; }
"$unsigned" { return TOK_TO_UNSIGNED; }

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@ -105,7 +105,7 @@ static void free_attr(std::map<std::string, AstNode*> *al)
bool boolean;
}
%token <string> TOK_STRING TOK_ID TOK_CONSTVAL TOK_REALVAL TOK_PRIMITIVE TOK_SVA_LABEL
%token <string> TOK_STRING TOK_ID TOK_CONSTVAL TOK_REALVAL TOK_PRIMITIVE TOK_SVA_LABEL TOK_ELAB_TASK
%token TOK_ASSERT TOK_ASSUME TOK_RESTRICT TOK_COVER
%token ATTR_BEGIN ATTR_END DEFATTR_BEGIN DEFATTR_END
%token TOK_MODULE TOK_ENDMODULE TOK_PARAMETER TOK_LOCALPARAM TOK_DEFPARAM
@ -1869,6 +1869,15 @@ gen_stmt:
if ($6 != NULL)
delete $6;
ast_stack.pop_back();
} |
TOK_ELAB_TASK {
AstNode *node = new AstNode(AST_TECALL);
node->str = *$1;
delete $1;
ast_stack.back()->children.push_back(node);
ast_stack.push_back(node);
} opt_arg_list ';'{
ast_stack.pop_back();
};
gen_stmt_block:

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@ -278,6 +278,17 @@ void log_file_warning(const std::string &filename, int lineno,
va_end(ap);
}
void log_file_info(const std::string &filename, int lineno,
const char *format, ...)
{
va_list ap;
va_start(ap, format);
std::string prefix = stringf("%s:%d: Info: ",
filename.c_str(), lineno);
logv_warning_with_prefix(prefix.c_str(), format, ap);
va_end(ap);
}
YS_ATTRIBUTE(noreturn)
static void logv_error_with_prefix(const char *prefix,
const char *format, va_list ap)

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@ -80,6 +80,7 @@ void log_warning(const char *format, ...) YS_ATTRIBUTE(format(printf, 1, 2));
// Log with filename to report a problem in a source file.
void log_file_warning(const std::string &filename, int lineno, const char *format, ...) YS_ATTRIBUTE(format(printf, 3, 4));
void log_file_info(const std::string &filename, int lineno, const char *format, ...) YS_ATTRIBUTE(format(printf, 3, 4));
void log_warning_noprefix(const char *format, ...) YS_ATTRIBUTE(format(printf, 1, 2));
YS_NORETURN void log_error(const char *format, ...) YS_ATTRIBUTE(format(printf, 1, 2), noreturn);

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@ -0,0 +1,30 @@
module test;
localparam X=1;
genvar i;
generate
if (X == 1)
$info("X is 1");
if (X == 1)
$warning("X is 1");
else
$error("X is not 1");
case (X)
1: $info("X is 1 in a case statement");
endcase
//case (X-1)
// 1: $warn("X is 2");
// default: $warn("X might be anything in a case statement");
//endcase
for (i = 0; i < 3; i = i + 1)
begin
case(i)
0: $info;
1: $warning;
default: $info("default case statemnent");
endcase
end
$info("This is a standalone $info(). Next $info has no parameters");
$info;
endgenerate
endmodule

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@ -0,0 +1 @@
read_verilog -sv elab_sys_tasks.sv