Commit Graph

1518 Commits

Author SHA1 Message Date
Clifford Wolf 4d304e3da7 Add a strictly coverage-driven mutation selection strategy
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-14 23:01:55 +01:00
Clifford Wolf 2a4263a75d Improve "mutate" wire coverage metric
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-14 23:01:01 +01:00
Clifford Wolf 1b4fdbb0d8 Add more mutation types, improve mutation src cover
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-14 22:04:42 +01:00
Clifford Wolf 6ad5d036c5 Add "mutate" command DB reduce functionality
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-14 22:04:42 +01:00
Clifford Wolf 8e6b69d7bb Add "mutate -mode inv", various other mutate improvements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-14 22:04:42 +01:00
Clifford Wolf ea8ee24140 Add basic "mutate -list N" framework
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-14 22:04:42 +01:00
Clifford Wolf f806b95ed6 Improve handling of and-with-1 and or-with-0 in opt_expr, fixes #327
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-14 20:52:00 +01:00
Clifford Wolf 399ab16315 Add $dffsr support to async2sync
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-09 11:52:00 -08:00
Eddie Hung d03780c3f4
Fix spelling in pmgen/README.md 2019-03-05 17:55:29 -08:00
Clifford Wolf ae9286386d Only run derive on blackbox modules when ports have dynamic size
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-02 12:36:46 -08:00
Larry Doolittle 57f8bb471f Try again for passes/pmgen/ice40_dsp_pm.h rule
Tested on both in-tree and out-of-tree builds
2019-03-01 20:20:53 -08:00
Clifford Wolf e847690bda Fix multiple issues in wreduce FF handling, fixes #835
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 17:24:46 -08:00
Larry Doolittle e2fc18f27b Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
Clifford Wolf 68a6937173 Fix pmgen for in-tree builds
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 14:56:05 -08:00
Clifford Wolf 64d91219b4 Fix pmgen for out-of-tree build
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 14:00:58 -08:00
Clifford Wolf 63be3f3bab Improvements in "supercover" pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-27 11:45:13 -08:00
Clifford Wolf a58dbcf2ba Add "supercover" skeleton
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-27 11:37:08 -08:00
Eddie Hung f7c7003a19 Merge remote-tracking branch 'origin/master' into xaig 2019-02-26 13:16:03 -08:00
Eddie Hung 7cac3b1c8b abc9 -- multiple connections for inouts 2019-02-26 12:18:28 -08:00
Larry Doolittle 61fc411c5d Clean up some whitepsace outliers 2019-02-26 09:39:46 -08:00
Eddie Hung 967297cd57 abc9 cleanup 2019-02-25 18:40:53 -08:00
Eddie Hung 721f6a14fb read_aiger to accept empty string for clk_name, passable only if no latches 2019-02-25 15:34:02 -08:00
Eddie Hung 0ca3fd6a1c abc9 not to clean after aigmap 2019-02-25 15:31:52 -08:00
Eddie Hung 51f28a6747 abc9 to call "clean" once at the end of all abc9_module() calls 2019-02-25 12:55:47 -08:00
Clifford Wolf c258b99040 Minor changes ontop of 71bcc4c: Remove hierarchy warning that is redundant to -check
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-24 20:41:36 +01:00
Clifford Wolf c118f9a377
Merge pull request #812 from ucb-bar/arrayhierarchyfixes
Define basic_cell_type() function and use it to derive the cell type …
2019-02-24 11:39:13 -08:00
Clifford Wolf cd722f26a5 Cleanups in ARST handling in wreduce
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-24 20:34:23 +01:00
Clifford Wolf da14bc8524
Merge pull request #824 from litghost/fix_reduce_on_ff
Fix WREDUCE on FF not fixing ARST_VALUE parameter.
2019-02-24 11:29:14 -08:00
Jim Lawson 71bcc4c644 Address requested changes - don't require non-$ name.
Suppress warning if name does begin with a `$`.
Fix hierachy tests so they have something to grep.
Announce hierarchy test types.
2019-02-22 16:06:10 -08:00
Keith Rothman 25680f6a07 Fix WREDUCE on FF not fixing ARST_VALUE parameter.
Adds test case that fails without code change.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-02-22 10:30:42 -08:00
Eddie Hung d56f02d1fc abc9 to use AIGER symbol table, as opposed to map file 2019-02-21 17:03:40 -08:00
Clifford Wolf 344afdcd5f
Merge pull request #740 from daveshah1/improve_dress
Improve ABC netname preservation
2019-02-22 01:16:34 +01:00
Eddie Hung 2811d66dea Revert "abc9 to write_xaiger -symbols, not -map"
This reverts commit 04429f8152.
2019-02-21 14:58:40 -08:00
Eddie Hung 7ad9628f07 Remove irrelevant citations 2019-02-21 14:41:11 -08:00
Eddie Hung 085ed9f487 Add attribution 2019-02-21 14:40:13 -08:00
Eddie Hung 875a02a6f2 abc9 to not select anything extra, and pop selection after final clean 2019-02-21 14:38:52 -08:00
Eddie Hung 04429f8152 abc9 to write_xaiger -symbols, not -map 2019-02-21 14:28:36 -08:00
Eddie Hung 3307295488 Merge branch 'read_aiger' into xaig 2019-02-21 14:27:32 -08:00
Eddie Hung 7f8f36273a abc9 to use &mfs 2019-02-21 13:16:24 -08:00
Eddie Hung a8803a1519 Merge remote-tracking branch 'origin/master' into xaig 2019-02-21 11:23:00 -08:00
Eddie Hung 6b96df41bc abc9 to only disconnect output ports of AND and NOT gates 2019-02-21 11:15:47 -08:00
Clifford Wolf d55790909c Hotfix for 4c82ddf
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 19:27:23 +01:00
Keith Rothman 4c82ddf394 Add -params mode to force undef parameters in selected cells.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-02-21 10:16:38 -08:00
Clifford Wolf 0e371109b0
Merge pull request #818 from YosysHQ/clifford/dffsrfix
Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816
2019-02-21 18:58:44 +01:00
Clifford Wolf 893194689d Fix typo in passes/pmgen/README.md
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 18:50:02 +01:00
Eddie Hung be061810d7 Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaig 2019-02-21 09:31:17 -08:00
Clifford Wolf 2da4c9c8f0 Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 13:49:45 +01:00
Clifford Wolf 2fe1c830eb Bugfix in ice40_dsp
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 13:28:46 +01:00
Eddie Hung 7f26043caf ABC -> ABC9 2019-02-20 17:36:57 -08:00
Eddie Hung e5b8bb9faa abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_ 2019-02-20 17:33:35 -08:00
Eddie Hung 32853b1f8d lut/not/and suffix to be ${lut,not,and} 2019-02-20 16:30:30 -08:00
Eddie Hung 2ca83005fb abc9 to cope with multiple modules 2019-02-20 12:56:15 -08:00
Eddie Hung d6b317b349 abc9 to use & syntax for -fast, and name fixes 2019-02-20 12:40:17 -08:00
Clifford Wolf 218e9051bb Add "synth_ice40 -dsp"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 16:42:27 +01:00
Clifford Wolf 246391200e Add FF support to wreduce
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 16:36:42 +01:00
Clifford Wolf dca65d83a0 Detect and reject cases that do not map well to iCE40 DSPs (yet)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 11:18:19 +01:00
Eddie Hung 62e5ff9ba8 abc9 to cope with indexed wires when creating $lut from $_NOT_ 2019-02-19 16:06:03 -08:00
Jim Lawson 5c4a72c43e Fix normal (non-array) hierarchy -auto-top.
Add simple test.
2019-02-19 14:35:15 -08:00
Eddie Hung 8158bc3f99 abc9 to replace $_NOT_ with $lut 2019-02-19 12:30:20 -08:00
Clifford Wolf 5a853ed46c Add actual DSP inference to ice40_dsp pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-17 15:35:48 +01:00
Clifford Wolf c06c062469 Merge branch 'master' of github.com:YosysHQ/yosys into pmgen 2019-02-17 12:10:19 +01:00
Eddie Hung 45d49d5d14 Get rid of debugging stuff in abc9 2019-02-16 22:25:22 -08:00
Eddie Hung f853b2f3c1 abc9 to write_aiger with -O option, and ignore dummy outputs 2019-02-16 20:09:40 -08:00
Eddie Hung d8c4d4e6c7 abc9 to handle comb loops, cope with constant outputs, disconnect using new wire 2019-02-16 13:47:38 -08:00
Eddie Hung e7c7ab8fc0 expose command to not skip 'internal' wires beginning with '$' 2019-02-16 13:45:17 -08:00
Eddie Hung d4545d415b abc9 to cope with non-wideports, count cells properly 2019-02-16 08:53:06 -08:00
Eddie Hung f8d0134598 Move lookup inside if 2019-02-15 15:23:26 -08:00
Eddie Hung a786ac4d53 Refactor 2019-02-15 13:00:13 -08:00
Eddie Hung 914546efd9 Cope with width != 1 when re-mapping cells 2019-02-15 12:55:52 -08:00
Eddie Hung 956ee545c5 abc9 to stitch results with CI/CO properly 2019-02-15 11:52:34 -08:00
Jim Lawson 5c504c5ae6 Define basic_cell_type() function and use it to derive the cell type for array references (instead of duplicating the code). 2019-02-15 11:31:37 -08:00
Eddie Hung 206f11dca3 Fix stitching 2019-02-13 17:04:23 -08:00
Eddie Hung f0f5d8a5cc Merge remote-tracking branch 'origin/read_aiger' into xaig 2019-02-13 14:09:36 -08:00
Eddie Hung 06cf0555ee Merge https://github.com/YosysHQ/yosys into xaig 2019-02-13 14:08:31 -08:00
Eddie Hung 87f059adf7 Rip out some more stuff 2019-02-13 10:44:52 -08:00
Eddie Hung 045f7763ae Rip out unused functions in abc9 2019-02-12 16:25:22 -08:00
Eddie Hung b3341b4abb WIP for ABC with aiger 2019-02-12 09:31:22 -08:00
Eddie Hung c23e3f0751 Missing headers for Xcode? 2019-02-12 09:24:13 -08:00
Eddie Hung 5a0a5aae4f Compile abc9 2019-02-08 13:58:47 -08:00
Eddie Hung e25a22015f Copy abc.cc to abc9.cc 2019-02-08 13:23:54 -08:00
David Shah a4515712cb fsm_opt: Fix runtime error for FSMs without a reset state
Signed-off-by: David Shah <dave@ds0.me>
2019-02-07 10:35:36 +00:00
David Shah 58c22dae31 abc: Improved recovered netnames, also preserve src on nets with dress
Signed-off-by: David Shah <davey1576@gmail.com>
2019-02-06 22:23:13 +01:00
David Shah 8524a479b1 abc: Preserve naming through ABC using 'dress' command
Signed-off-by: David Shah <dave@ds0.me>
2019-02-06 22:23:13 +01:00
whitequark 58d059ccb7 proc_clean: fix critical typo. 2019-01-23 22:08:38 +00:00
whitequark 95b6c35882 proc_clean: fix fully def check to consider compare/signal length.
Fixes #790.
2019-01-18 23:22:19 +00:00
Clifford Wolf 8ddec5d882 Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf 5216735210 Progress in pmgen, add pmgen README
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf 55ac030382 Fix pmgen "reject" statement
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf d45379936b Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf 1f8e76f993 Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf b9545aa0e1 Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf ad69c668ce Add mockup .pmg (pattern matcher generator) file
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
whitequark e792bd56b7 flowmap: clean up terminology.
* "map": group gates into LUTs;
  * "pack": replace gates with LUTs.

This is important because we have FlowMap and DF-Map, and currently
our messages are ambiguous.

Also clean up some other log messages while we're at it.
2019-01-08 02:05:06 +00:00
whitequark 211c26a4c9 flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00
Clifford Wolf 8a63fc51d3 Bugfix in $memrd sharing
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-07 10:04:47 +01:00
Clifford Wolf dbd51d7bda
Merge pull request #782 from whitequark/flowmap_dfs
flowmap: construct a max-volume max-flow min-cut, not just any one
2019-01-07 09:47:57 +01:00
Clifford Wolf b5f6e786ea Switch "bugpoint" from system() to run_command()
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-07 09:45:21 +01:00
whitequark a342d6db49 bugpoint: new pass.
A typical use of `bugpoint` would involve a script with a pass under
test, e.g.:

    flowmap -relax -optarea 100

and would be invoked as:

    bugpoint -yosys ./yosys -script flowmap.ys -clean -cells

This replaces the current design with the minimal design that still
crashes the `flowmap.ys` script.

`bugpoint` can also be used to perform generic design minimization
using `select`, e.g. the following script:

    select i:* %x t:$_MUX_ %i -assert-max 0

would remove all parts of the design except for an unbroken path from
an input to an output port that goes through exactly one $_MUX_ cell.
(The condition is inverted.)
2019-01-07 03:13:19 +00:00
whitequark 8b44198e23 flowmap: construct a max-volume max-flow min-cut, not just any one. 2019-01-06 19:51:37 +00:00
Scott Mansell 62c90c4e17 Rename cells based on the wires they drive. 2019-01-06 19:00:16 +13:00