Miodrag Milanović
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0d27ffd4e6
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Merge pull request #1416 from YosysHQ/mmicko/frontend_binary_in
Open aig frontend as binary file
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2019-09-30 17:49:23 +02:00 |
Eddie Hung
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1123c09588
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Merge remote-tracking branch 'origin/master' into xaig_dff
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2019-09-29 19:39:12 -07:00 |
Miodrag Milanovic
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9e55b234b4
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Fix reading aig files on windows
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2019-09-29 15:40:37 +02:00 |
Miodrag Milanovic
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3f70c1fd26
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Open aig frontend as binary file
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2019-09-29 13:22:11 +02:00 |
Eddie Hung
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79b6edb639
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Big rework; flop info now mostly in cells_sim.v
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2019-09-28 23:48:17 -07:00 |
Eddie Hung
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c340fbfab2
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Force $inout.out ports to begin with '$' to indicate internal
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2019-09-23 21:58:04 -07:00 |
Eddie Hung
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b66c99ece0
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Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext
peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells
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2019-09-18 12:40:08 -07:00 |
Eddie Hung
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38e73a3788
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Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp
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2019-09-05 13:01:34 -07:00 |
Eddie Hung
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d3eea82bc2
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Revert "parse_xaiger() to do "clean -purge""
This reverts commit 5d16bf8316 .
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2019-09-04 15:21:39 -07:00 |
Eddie Hung
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c7f1ccbcb0
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Merge remote-tracking branch 'origin/master' into xaig_arrival
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2019-08-30 12:28:35 -07:00 |
Eddie Hung
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5d16bf8316
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parse_xaiger() to do "clean -purge"
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2019-08-29 17:24:25 -07:00 |
Eddie Hung
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f1a206ba03
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Revert "Remove sequential extension"
This reverts commit 091bf4a18b .
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2019-08-20 18:17:14 -07:00 |
Eddie Hung
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091bf4a18b
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Remove sequential extension
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2019-08-20 18:16:37 -07:00 |
Eddie Hung
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be9e4f1b67
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Use abc_{map,unmap,model}.v
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2019-08-20 12:39:11 -07:00 |
Eddie Hung
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3f4886e7a3
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Fix typo
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2019-08-19 10:42:00 -07:00 |
Eddie Hung
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2f4e0a5388
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Merge remote-tracking branch 'origin/master' into xaig_dff
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2019-08-19 10:07:27 -07:00 |
Eddie Hung
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9bfe924e17
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Set abc_flop and use it in toposort
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2019-08-19 09:40:01 -07:00 |
Eddie Hung
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24c934f1af
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Merge branch 'eddie/abc9_refactor' into xaig_dff
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2019-08-16 16:51:22 -07:00 |
Eddie Hung
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6b156beda1
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Remove unused variable
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2019-08-16 13:35:39 -07:00 |
Clifford Wolf
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0c5db07cd6
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Fix various NDEBUG compiler warnings, closes #1255
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-13 13:29:03 +02:00 |
Clifford Wolf
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f54bf1631f
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Merge pull request #1258 from YosysHQ/eddie/cleanup
Cleanup a few barnacles across codebase
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2019-08-10 09:52:14 +02:00 |
Eddie Hung
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446dcb3ed3
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Add __STDC_FORMAT_MACROS before <inttypes.h> as per @mithro
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2019-08-09 09:17:35 -07:00 |
Eddie Hung
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03ec8d6551
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Run "clean" on mapped_mod in its own design
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2019-08-07 09:54:27 -07:00 |
Eddie Hung
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a6bc9265fb
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RTLIL::S{0,1} -> State::S{0,1}
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2019-08-06 16:23:37 -07:00 |
Miodrag Milanovic
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28b7053a01
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Fix formatting for msys2 mingw build using GetSize
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2019-08-01 17:27:34 +02:00 |
William D. Jones
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da5d64d71e
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Fix missing semicolon in Windows-specific code in aigerparse.cc.
Signed-off-by: William D. Jones <thor0505@comcast.net>
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2019-07-14 13:52:27 -04:00 |
Eddie Hung
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a314565ad4
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Short out async box
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2019-07-11 10:52:45 -07:00 |
Eddie Hung
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bd198aa803
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Missing debug message
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2019-07-11 10:07:14 -07:00 |
Eddie Hung
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f8f0ffe786
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Small opt
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2019-07-10 18:56:50 -07:00 |
Eddie Hung
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4a995c5d80
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Change how to specify flops to ABC again
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2019-07-10 17:54:56 -07:00 |
Eddie Hung
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a092c48f03
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Use split_tokens()
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2019-07-10 17:34:51 -07:00 |
Eddie Hung
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a31e17182d
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Refactor and cope with new abc_flop format
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2019-07-01 11:50:34 -07:00 |
Eddie Hung
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ac5f3d500d
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Fix spacing
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2019-07-01 11:10:44 -07:00 |
Eddie Hung
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699d8e3939
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Merge remote-tracking branch 'origin/master' into xaig_dff
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2019-07-01 10:44:42 -07:00 |
Eddie Hung
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b3f162e94e
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Replace log_assert() with meaningful log_error()
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2019-06-28 12:54:44 -07:00 |
Eddie Hung
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9398921af1
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Refactor for one "abc_carry" attribute on module
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2019-06-27 16:07:14 -07:00 |
Eddie Hung
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469f98b6bd
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Remove unneeded include
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2019-06-27 11:20:40 -07:00 |
Eddie Hung
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f2ead4334a
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Reduce log_debug spam in parse_xaiger()
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2019-06-21 17:33:49 -07:00 |
Eddie Hung
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b75863ca3f
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Workaround issues exposed by gcc-4.8
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2019-06-21 14:31:09 -07:00 |
Eddie Hung
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9faeba7a66
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Fix broken abc9.v test due to inout being 1'bx
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2019-06-20 19:41:27 -07:00 |
Eddie Hung
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014606affe
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Fix issue with part of PI being 1'bx
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2019-06-20 17:38:16 -07:00 |
Eddie Hung
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0c59bc0b75
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Cleanup
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2019-06-16 10:42:00 -07:00 |
Eddie Hung
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fb90d8c18c
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Cleanup
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2019-06-16 09:34:26 -07:00 |
Eddie Hung
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3d1185b835
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Read init from outputs
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2019-06-15 22:41:42 -07:00 |
Eddie Hung
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c04921c3a8
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Fix debug message
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2019-06-15 18:13:44 -07:00 |
Eddie Hung
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b706ae82de
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Fix log_debug messages
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2019-06-15 12:42:18 -07:00 |
Eddie Hung
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7a3c403ba0
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Missing close bracket
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2019-06-15 09:10:01 -07:00 |
Eddie Hung
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2ef2aa997c
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read_aiger to not require clk_name for latches, plus debug
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2019-06-15 09:07:53 -07:00 |
Eddie Hung
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7876b5b8be
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Cover __APPLE__ too for little to big endian
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2019-06-14 12:40:51 -07:00 |
Eddie Hung
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a48b5bfaa5
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Further cleanup based on @daveshah1
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2019-06-14 12:25:06 -07:00 |
Eddie Hung
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97d2656375
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Resolve comments from @daveshah1
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2019-06-14 12:00:02 -07:00 |
Eddie Hung
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a3be25ab0d
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Cleanup
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2019-06-14 10:27:30 -07:00 |
Eddie Hung
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d005568f2e
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Add TODO to parse_xaiger
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2019-06-14 10:11:13 -07:00 |
Eddie Hung
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bc22e2e3ee
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Optimise some more
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2019-06-13 17:02:58 -07:00 |
Eddie Hung
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d09d4e0706
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Move ConstEvalAig to aigerparse.cc
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2019-06-13 16:28:11 -07:00 |
Eddie Hung
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d39a5a77a9
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Add ConstEvalAig specialised for AIGs
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2019-06-13 13:13:48 -07:00 |
Eddie Hung
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342fc0a600
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parse_xaiger to cope with inouts
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2019-06-12 15:45:46 -07:00 |
Eddie Hung
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b21d29598a
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Consistency
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2019-06-12 09:40:51 -07:00 |
Eddie Hung
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f7a9769c14
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Merge remote-tracking branch 'origin/master' into xaig
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2019-06-12 08:50:39 -07:00 |
Eddie Hung
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2b350401c4
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Fix spacing from spaces to tabs
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2019-06-07 15:44:57 -07:00 |
Eddie Hung
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6934f4bdd5
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Fix spacing (entire file is wrong anyway, will fix later)
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2019-06-07 11:30:36 -07:00 |
Eddie Hung
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d00ae1d6a8
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Remove unnecessary std::getline() for ASCII
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2019-06-07 11:28:25 -07:00 |
Eddie Hung
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a04521c6b7
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Fix read_aiger -- create zero driver, fix init width, parse 'b'
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2019-06-07 11:07:15 -07:00 |
Eddie Hung
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7057753427
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Rename label
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2019-05-21 18:20:31 -07:00 |
Eddie Hung
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b5a29460b9
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Try again
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2019-05-21 17:20:19 -07:00 |
Eddie Hung
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1bff09f2ff
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Fix warning
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2019-05-21 16:26:20 -07:00 |
Eddie Hung
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d9c915042a
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Move clean from aigerparse to abc9
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2019-04-23 13:42:35 -07:00 |
Eddie Hung
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5f30a8795d
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Tidy up
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2019-04-22 17:47:05 -07:00 |
Eddie Hung
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8f30019b68
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Revert "Temporarily remove 'r' extension"
This reverts commit eaf3c24772 .
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2019-04-22 17:41:21 -07:00 |
Eddie Hung
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eaf3c24772
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Temporarily remove 'r' extension
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2019-04-22 11:54:19 -07:00 |
Eddie Hung
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4883391b63
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Merge remote-tracking branch 'origin/master' into xaig
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2019-04-22 11:19:52 -07:00 |
Clifford Wolf
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e158ea2097
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Add log_debug() framework
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-04-22 17:25:52 +02:00 |
Eddie Hung
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21701cc1df
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read_aiger to parse 'r' extension
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2019-04-18 17:39:36 -07:00 |
Eddie Hung
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e1b550d203
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Ignore a/i/o/h XAIGER extensions
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2019-04-17 10:55:23 -07:00 |
Eddie Hung
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fecafb2207
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Forgot backslashes
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2019-04-12 18:22:44 -07:00 |
Eddie Hung
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9bfcd80063
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Handle __dummy_o__ and __const[01]__ in read_aiger not abc
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2019-04-12 18:21:16 -07:00 |
Eddie Hung
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c776db3320
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
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2019-04-12 17:09:24 -07:00 |
Eddie Hung
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acf3f5694b
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Fix inout handling for -map option
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2019-04-12 17:02:24 -07:00 |
Eddie Hung
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ada130b459
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Also cope with duplicated CIs
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2019-04-12 16:17:12 -07:00 |
Eddie Hung
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1c6f0cffd9
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Cope with an output having same name as an input (i.e. CO)
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2019-04-12 12:27:07 -07:00 |
Eddie Hung
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1a49cf29d8
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parse_aiger() to rename all $lut cells after "clean"
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2019-04-10 14:02:23 -07:00 |
Eddie Hung
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36efec01b8
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Fix spacing
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2019-04-08 16:37:22 -07:00 |
Eddie Hung
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bca3cf6843
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Merge branch 'master' into xaig
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2019-04-08 16:31:59 -07:00 |
Eddie Hung
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3e89cf68bd
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Add author name
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2019-03-19 08:52:06 -07:00 |
Eddie Hung
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da076344cc
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parse_xaiger() to really pass single and multi-bit inout tests
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2019-02-26 12:04:45 -08:00 |
Eddie Hung
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8f02c846f6
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parse_xaiger() to cope with multi bit inouts
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2019-02-26 11:37:34 -08:00 |
Eddie Hung
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316232a7dd
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parse_xaiger() to untransform $inout.out output ports
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2019-02-25 18:40:23 -08:00 |
Eddie Hung
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721f6a14fb
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read_aiger to accept empty string for clk_name, passable only if no latches
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2019-02-25 15:34:02 -08:00 |
Eddie Hung
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07036b8bf7
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read_aiger to work with symbol table
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2019-02-21 17:01:07 -08:00 |
Eddie Hung
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085ed9f487
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Add attribution
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2019-02-21 14:40:13 -08:00 |
Eddie Hung
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3307295488
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Merge branch 'read_aiger' into xaig
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2019-02-21 14:27:32 -08:00 |
Eddie Hung
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9e299a0908
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read_aiger to not do -purge for clean
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2019-02-20 17:33:04 -08:00 |
Eddie Hung
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32853b1f8d
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lut/not/and suffix to be ${lut,not,and}
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2019-02-20 16:30:30 -08:00 |
Eddie Hung
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abc1c2672e
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read_aiger to also rename 0 index lut when wideports
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2019-02-20 16:17:22 -08:00 |
Eddie Hung
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f9702a8abe
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read_aiger: new naming fixes
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2019-02-20 12:39:51 -08:00 |
Eddie Hung
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83b66861e9
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read_aiger to name wires with internal name, less likely to clash
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2019-02-20 11:22:56 -08:00 |
Eddie Hung
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7b026c4bc3
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Same for ascii AIGERs too
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2019-02-19 15:15:50 -08:00 |
Eddie Hung
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d304882cba
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read_aiger to cope with non-unique POs
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2019-02-19 15:14:08 -08:00 |
Eddie Hung
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e79df5e70e
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read_aiger to create sane $lut names, and rename when renaming driving wire
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2019-02-19 12:27:50 -08:00 |
Eddie Hung
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0b1fc46ae3
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Add comment
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2019-02-19 10:24:55 -08:00 |