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814 Commits 16 Branches 1 Tag 1.8 GiB
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814 Commits

Author SHA1 Message Date
Ganesh Gore abea1a8aa0 Changed fpga_top to fpga_core 2023-03-17 10:23:05 -06:00
Ganesh Gore 9db5e34f3b Added scan chain ports 2023-03-17 10:20:14 -06:00
Ganesh Gore f10d475363 Added sample pin constraint run 2023-03-17 09:50:23 -06:00
Ganesh Gore 5f817acd38 Added post tile shaping information 2023-03-16 10:06:40 -06:00
Ganesh Gore a6ee2a847b Fixing CI runner 2023-03-01 22:37:04 -07:00
Ganesh Gore 4ab8440233 Fixed architecture files for new OpenFPGA version 2023-03-01 22:31:24 -07:00
Ganesh Gore e2f3839993 Updated rendering 2023-03-01 22:10:09 -07:00
Ganesh Gore 44a0f0d2c9 Fixed global signal 2023-03-01 21:32:43 -07:00
Ganesh Gore 28781e8762 Added global signal feedthrough 2023-03-01 20:53:28 -07:00
Ganesh Gore fc87f9a977 Added reset and prog_reset feedthrough 2023-03-01 20:41:37 -07:00
Ganesh Gore 8d120b23b6 Updated port names 2023-03-01 15:59:04 -07:00
Ganesh Gore df1bdf01ea Added clock tree 2023-03-01 15:40:06 -07:00
Ganesh Gore 9caffc11d2 Added global signal connectivity patterns 2023-03-01 10:09:45 -07:00
Ganesh Gore 06fa0f323c Updated CPP and SC_HEIGHT values 2023-03-01 09:57:54 -07:00
Ganesh Gore 4d09cfbc26 Added SOFA-A project 2023-03-01 09:31:42 -07:00
Ganesh Gore a4d147e491 Added OpenFPGA-Physical submodule 2023-03-01 08:57:56 -07:00
Ganesh Gore f5ff147ddb Added sofa fpga lite design 2023-02-19 10:59:18 -07:00
Grant Brown e508bdd905
Merge pull request #134 from lnis-uofu/roman_dev 
Fix typos causing the unknown `write_verilog_testbench` command errors
 2022-02-04 16:21:28 -07:00
romangauchi bc43b6b9b3 [SOFA_PLUS] remove 'the task.conf', which must be generated with the 'make runOpenFPGA' command 2022-02-04 13:27:45 -07:00
romangauchi 568de2497b [SOFA] fix typos in the 'generate_testbench.openfpga' script causing the unknown 'write_verilog_testbench' command error' 2022-01-31 11:36:42 -07:00
romangauchi 250aafe02d [SOFA_PLUS] fix the default OpenFPGA task testbench/simulation 2022-01-30 22:29:32 -07:00
tangxifan 47b839fa0a
Merge pull request #125 from lnis-uofu/tangxifan-patch-1 
Update generate_testbench.openfpga
 2021-07-24 15:08:26 -07:00
tangxifan 5183326946
Update generate_testbench.openfpga 
Address #124
 2021-07-24 14:59:34 -07:00
tangxifan 45184c35ea
Merge pull request #123 from lnis-uofu/xt_dev 
Update openfpga shell script due to the deprecation of 'write_verilog_testbench'
 2021-06-29 16:28:28 -06:00
tangxifan 56dd34da86 [Script] Update script due to deprecation of 'write_verilog_testbench' 2021-06-09 19:43:28 -06:00
tangxifan 51a00d4612 Merge branch 'master' into xt_dev 2021-06-09 19:42:36 -06:00
tangxifan d15e7db1be [Script] Update openfpga shell script due to the deprecation of 'write_verilog_testbench' 2021-06-09 19:40:41 -06:00
Ganesh Gore 950e4c8cf0 [SOFA_PLUS] Project setup 2021-05-31 12:42:56 -06:00
Ganesh Gore 7d4b57da04 [SOFA] Updated task configuration 2021-05-31 12:05:36 -06:00
tangxifan bcf5d6513c
Merge pull request #122 from lnis-uofu/xt_dev 
Add SOFA+ Architecture with fracturable 18x18 multiplier
 2021-05-26 10:35:00 -06:00
tangxifan 6e99257bed [Arch] Now use SuperLUT4 to implement adder LUT functions 2021-05-25 18:19:54 -06:00
tangxifan 77a8a8644a [Arch] Now use timing variables in the architecture file 2021-05-25 17:11:30 -06:00
tangxifan 7d5eabbb36 [Arch] Add 10x10 layout as an option choice in tape-out in case we want 100 route channel width 2021-05-25 16:24:51 -06:00
tangxifan 2e1224c787 [Arch] Upgrade SOFA+ architecture: (1) remove shift registers; (2) add multi-mode flip-flops; (3) use scan-enable FF as configurable memory; 2021-05-21 18:38:02 -06:00
tangxifan 8fe6a8e90d [Arch] Patch openfpga arch for SOFA+ to fix an error when linking arch 2021-05-21 12:59:19 -06:00
tangxifan 772212e1bb [Arch] Patch SOFA+ arch to be symetric when placing DSP blocks 2021-05-19 16:23:58 -06:00
tangxifan 7da67d75cc [Arch] Patch SOFA+ arch 2021-05-19 13:41:59 -06:00
tangxifan 29d68c3ec2 [Arch] Add yosys technology library for the DSP block synthesis of SOFA+ arch 2021-05-19 13:41:33 -06:00
tangxifan a017a2f23c [Script] Add example openfpga shell script for the Sofa+ arch 2021-05-19 13:40:49 -06:00
tangxifan 990b7d4c7c [Arch] Add openfpga arch with fracturable 18x18 multiplier 2021-05-19 11:33:33 -06:00
tangxifan 957d03b142 [Arch] Add SOFA+ architecture with fracturable 18x18 multiplier 2021-05-19 11:21:49 -06:00
tangxifan 5380bd4e70 [Doc] Update README for architecture files 2021-05-18 15:31:38 -06:00
Ganesh Gore 698a833475 Minor changes before demo 2021-05-14 11:30:22 -06:00
ganeshgore fd56949ead
Merge pull request #120 from lnis-uofu/ganesh_dev 
[CICD] Force CI on the master push/after merge to master
 2021-04-06 22:41:14 -06:00
ganeshgore 2f4005cde9
Merge branch 'master' into ganesh_dev 2021-04-06 22:31:40 -06:00
ganeshgore b653f4ef82
Merge pull request #121 from lnis-uofu/gg_demo 
[Demo] Runs only counter example
 2021-04-06 22:31:34 -06:00
ganeshgore f4b5080c0c
Merge branch 'master' into ganesh_dev 2021-04-06 22:30:05 -06:00
ganeshgore c836e2c58a
Merge branch 'master' into gg_demo 2021-04-06 22:28:58 -06:00
Ganesh Gore 18a9fef72e [Demo] Runs only counter example 2021-04-06 22:28:06 -06:00
tangxifan 77bba4ec2c
Merge pull request #100 from lnis-uofu/arch_exploration 
Added arch exploration files
 2021-04-06 21:55:14 -06:00