Eddie Hung
|
1ec450d6bf
|
Try -W 300
|
2019-06-16 12:08:03 -07:00 |
Eddie Hung
|
5f9ba3ea41
|
Merge remote-tracking branch 'origin/xaig' into xc7mux
|
2019-06-16 12:05:07 -07:00 |
Eddie Hung
|
fb90d8c18c
|
Cleanup
|
2019-06-16 09:34:26 -07:00 |
Eddie Hung
|
842c110357
|
Merge remote-tracking branch 'origin/xaig' into xc7mux
|
2019-06-15 05:48:47 -07:00 |
Eddie Hung
|
bf312043d4
|
Fix upper XC7 LUT[78] delays to use I[01] -> O delay not S -> O
|
2019-06-15 05:45:16 -07:00 |
Eddie Hung
|
627ea0b2a9
|
Merge remote-tracking branch 'origin/xaig' into xc7mux
|
2019-06-14 14:20:36 -07:00 |
Eddie Hung
|
7ff8330d1e
|
Leave breadcrumb behind
|
2019-06-14 13:34:40 -07:00 |
Eddie Hung
|
46e69ee934
|
Remove redundant condition
|
2019-06-14 13:31:18 -07:00 |
Eddie Hung
|
9b55e69755
|
Revert "Cleanup/optimise toposort in write_xaiger"
This reverts commit 1948e7c846 .
Restores old toposort with optimisations
|
2019-06-14 13:29:36 -07:00 |
Eddie Hung
|
4d7516f459
|
Revert "Cleanup/optimise toposort in write_xaiger"
This reverts commit 1948e7c846 .
Restores old toposort with optimisations
|
2019-06-14 13:28:47 -07:00 |
Eddie Hung
|
6c5ed8b660
|
Merge remote-tracking branch 'origin/xaig' into xc7mux
|
2019-06-14 13:15:12 -07:00 |
Eddie Hung
|
746f70a9ce
|
Update comment
|
2019-06-14 13:10:46 -07:00 |
Eddie Hung
|
0fa6a441f1
|
Check that whiteboxes are synthesisable
|
2019-06-14 13:08:38 -07:00 |
Eddie Hung
|
2d85725604
|
Get rid of compiler warnings
|
2019-06-14 13:07:56 -07:00 |
Eddie Hung
|
13e2e8df11
|
Update CHANGELOG
|
2019-06-14 12:50:30 -07:00 |
Eddie Hung
|
b63b2a0bd4
|
Revert "Remove wide mux inference"
This reverts commit 738fdfe8f5 .
|
2019-06-14 12:50:24 -07:00 |
Eddie Hung
|
691e145cda
|
Merge branch 'xaig' into xc7mux
|
2019-06-14 12:46:52 -07:00 |
Eddie Hung
|
8fa74287a7
|
As per @daveshah1 remove async DFF timing from xilinx
|
2019-06-14 12:43:20 -07:00 |
Eddie Hung
|
7876b5b8be
|
Cover __APPLE__ too for little to big endian
|
2019-06-14 12:40:51 -07:00 |
Eddie Hung
|
a632799d5b
|
Update abc9 -D doc
|
2019-06-14 12:29:46 -07:00 |
Eddie Hung
|
e391fc8e7b
|
Enable "abc9 -D <num>" for timing-driven synthesis
|
2019-06-14 12:28:01 -07:00 |
Eddie Hung
|
a48b5bfaa5
|
Further cleanup based on @daveshah1
|
2019-06-14 12:25:06 -07:00 |
Eddie Hung
|
97d2656375
|
Resolve comments from @daveshah1
|
2019-06-14 12:00:02 -07:00 |
Eddie Hung
|
2e34859a6b
|
Add XC7_WIRE_DELAY macro to synth_xilinx.cc
|
2019-06-14 11:38:22 -07:00 |
Eddie Hung
|
ba4b4a0088
|
Update delays based on SymbiFlow/prjxray-db
|
2019-06-14 11:33:10 -07:00 |
Eddie Hung
|
d47ff7ba87
|
Rename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut}
|
2019-06-14 10:51:11 -07:00 |
Eddie Hung
|
94314ae2d5
|
Comment out dist RAM boxing on ECP5 for now
|
2019-06-14 10:42:30 -07:00 |
Eddie Hung
|
ee428f73ab
|
Remove WIP ABC9 flop support
|
2019-06-14 10:37:52 -07:00 |
Eddie Hung
|
42f6b48d56
|
Merge remote-tracking branch 'origin/master' into xaig
|
2019-06-14 10:33:27 -07:00 |
Eddie Hung
|
627a62a797
|
Make doc consistent
|
2019-06-14 10:32:46 -07:00 |
Eddie Hung
|
1656c44373
|
Cleanup
|
2019-06-14 10:29:27 -07:00 |
Eddie Hung
|
751e640c1d
|
Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
|
2019-06-14 10:29:16 -07:00 |
Eddie Hung
|
474fe9f47a
|
Merge pull request #1097 from YosysHQ/dave/xaig_ecp5
Add ECP5 ABC9 support (to xaig branch)
|
2019-06-14 10:28:30 -07:00 |
Eddie Hung
|
a3be25ab0d
|
Cleanup
|
2019-06-14 10:27:30 -07:00 |
Eddie Hung
|
1948e7c846
|
Cleanup/optimise toposort in write_xaiger
|
2019-06-14 10:13:17 -07:00 |
Eddie Hung
|
a5425a2f7e
|
Remove extra semicolon
|
2019-06-14 10:11:34 -07:00 |
Eddie Hung
|
d005568f2e
|
Add TODO to parse_xaiger
|
2019-06-14 10:11:13 -07:00 |
David Shah
|
9566573054
|
ecp5: Add abc9 option
Signed-off-by: David Shah <dave@ds0.me>
|
2019-06-14 17:15:02 +01:00 |
Eddie Hung
|
bc22e2e3ee
|
Optimise some more
|
2019-06-13 17:02:58 -07:00 |
Eddie Hung
|
d09d4e0706
|
Move ConstEvalAig to aigerparse.cc
|
2019-06-13 16:28:11 -07:00 |
Eddie Hung
|
75d89e56cf
|
Fix name clash
|
2019-06-13 14:27:07 -07:00 |
Eddie Hung
|
63e2f83632
|
More slimming
|
2019-06-13 13:29:03 -07:00 |
Eddie Hung
|
d39a5a77a9
|
Add ConstEvalAig specialised for AIGs
|
2019-06-13 13:13:48 -07:00 |
Eddie Hung
|
7f9d2d1825
|
Update CHANGELOG with "synth -abc9"
|
2019-06-13 09:15:30 -07:00 |
Eddie Hung
|
2052806d33
|
Fix LP SB_LUT4 timing
|
2019-06-13 08:24:33 -07:00 |
Eddie Hung
|
9d34cea65a
|
More accurate CHANGELOG
|
2019-06-13 08:22:22 -07:00 |
Serge Bazanski
|
d4f77d408c
|
Merge pull request #829 from abdelrahmanhosny/master
Dockerfile for Yosys
|
2019-06-13 12:14:37 +02:00 |
Eddie Hung
|
c04482b077
|
Update CHANGELOG
|
2019-06-12 16:54:12 -07:00 |
Eddie Hung
|
2c40b66785
|
Rip out all non FPGA stuff from abc9
|
2019-06-12 16:53:12 -07:00 |
Eddie Hung
|
f81a189fb8
|
Fix spelling
|
2019-06-12 16:52:09 -07:00 |