mirror of https://github.com/YosysHQ/yosys.git
Get rid of compiler warnings
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parent
8fa74287a7
commit
2d85725604
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@ -190,7 +190,7 @@ struct XAigerWriter
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bool abc_box_seen = false;
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for (auto cell : module->cells()) {
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for (auto cell : module->selected_cells()) {
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if (cell->type == "$_NOT_")
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{
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SigBit A = sigmap(cell->getPort("\\A").as_bit());
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@ -312,7 +312,7 @@ struct XAigerWriter
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TopoSort<IdString, RTLIL::sort_by_id_str> toposort;
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dict<SigBit, pool<IdString>> bit_drivers, bit_users;
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for (auto cell : module->cells()) {
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for (auto cell : module->selected_cells()) {
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RTLIL::Module* inst_module = module->design->module(cell->type);
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if (!inst_module || !inst_module->attributes.count("\\abc_box_id"))
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continue;
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@ -243,8 +243,8 @@ struct abc_output_filter
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void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::string script_file, std::string exe_file,
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bool cleanup, vector<int> lut_costs, bool dff_mode, std::string clk_str,
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bool keepff, std::string delay_target, std::string lutin_shared, bool fast_mode,
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const std::vector<RTLIL::Cell*> &cells, bool show_tempdir, bool sop_mode, std::string box_file, std::string lut_file,
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bool /*keepff*/, std::string delay_target, std::string /*lutin_shared*/, bool fast_mode,
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bool show_tempdir, std::string box_file, std::string lut_file,
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std::string wire_delay)
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{
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module = current_module;
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@ -835,7 +835,7 @@ struct Abc9Pass : public Pass {
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std::string script_file, clk_str, box_file, lut_file;
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std::string delay_target, lutin_shared = "-S 1", wire_delay;
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bool fast_mode = false, dff_mode = false, keepff = false, cleanup = true;
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bool show_tempdir = false, sop_mode = false;
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bool show_tempdir = false;
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vector<int> lut_costs;
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markgroups = false;
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@ -997,7 +997,7 @@ struct Abc9Pass : public Pass {
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if (!dff_mode || !clk_str.empty()) {
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abc9_module(design, mod, script_file, exe_file, cleanup, lut_costs, dff_mode, clk_str, keepff,
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delay_target, lutin_shared, fast_mode, mod->selected_cells(), show_tempdir, sop_mode,
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delay_target, lutin_shared, fast_mode, show_tempdir,
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box_file, lut_file, wire_delay);
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continue;
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}
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@ -1143,7 +1143,7 @@ struct Abc9Pass : public Pass {
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en_polarity = std::get<2>(it.first);
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en_sig = assign_map(std::get<3>(it.first));
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abc9_module(design, mod, script_file, exe_file, cleanup, lut_costs, !clk_sig.empty(), "$",
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keepff, delay_target, lutin_shared, fast_mode, it.second, show_tempdir, sop_mode,
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keepff, delay_target, lutin_shared, fast_mode, show_tempdir,
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box_file, lut_file, wire_delay);
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assign_map.set(mod);
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}
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