Commit Graph

1754 Commits

Author SHA1 Message Date
tangxifan 977283dd34 [core] typo 2024-07-10 14:12:49 -07:00
tangxifan af996e563e [test] add a new test to validate reset generated by internal driver through programmable clock network 2024-07-10 14:11:06 -07:00
tangxifan b6ff69faac [test] reworking the testcase to validate clock network with internal drivers 2024-07-10 11:36:22 -07:00
tangxifan dbe8e63f53 [test] remove unused files 2024-07-10 10:15:47 -07:00
tangxifan 77304164f4 [test] rework pin loc for k4_frac_N4_tileable_fracff_40nm to save route W 2024-07-10 10:13:41 -07:00
tangxifan 191a3d1c5e [test] update W 2024-07-10 10:01:31 -07:00
tangxifan 81fe722d98 [test] adjust W 2024-07-09 23:49:01 -07:00
tangxifan 63f2a07c86 [test] typo 2024-07-09 22:54:33 -07:00
tangxifan a16b3df063 [test] update arch to allow clock access on CLB inputs 2024-07-09 20:59:44 -07:00
tangxifan 43dbeafd44 [test] typo 2024-07-09 20:27:28 -07:00
tangxifan 9ce4b57363 [test] typo 2024-07-09 20:25:39 -07:00
tangxifan e5d146a67a [test] add new tests to validate rst on lut and clk on lut features 2024-07-09 20:24:23 -07:00
tangxifan 89e6a0483f [test] add a new benchmark to validate rst and clk on LUTs 2024-07-09 18:45:33 -07:00
tangxifan 38bb5aa906 [test] add a new benchmark to validate clock on LUT 2024-07-09 18:42:39 -07:00
tangxifan 5efc9d0e00 [test] update golden outputs 2024-07-08 23:24:16 -07:00
tangxifan 5cb104a5f6 [test] fixed a bug 2024-07-08 22:04:40 -07:00
tangxifan 41839bfd7a [test] typo 2024-07-08 20:21:40 -07:00
tangxifan 03c1c6f917 [test] code format 2024-07-08 18:35:23 -07:00
tangxifan c7d6c3ab61 [arch] now all the outputs of I/O can only on 1 side 2024-07-08 18:34:13 -07:00
tangxifan ad053cddca [test] code format 2024-07-08 18:02:30 -07:00
tangxifan c30eafac9f [test] fixed a bug on clk ntwk arch where some io clocks are not tapped 2024-07-08 15:26:16 -07:00
tangxifan b50acacfba [test] fixed some bug in pin loc; Outputs are not recommend on the fringe I/O tiles 2024-07-08 15:09:31 -07:00
tangxifan 6492d43a01 [test] add a new test to validate perimeter cb using global tile clock 2024-07-08 11:29:20 -07:00
tangxifan 48ae3691c4 [test] typo 2024-07-08 10:57:54 -07:00
tangxifan 5c9c4d93c5 [core] typo 2024-07-08 10:46:47 -07:00
tangxifan ff56139a53 [test] debugging 2024-07-07 23:07:51 -07:00
tangxifan b0851a6299 [test] debugging 2024-07-07 23:05:37 -07:00
tangxifan 686cd761b7 [test] debugging 2024-07-07 22:48:21 -07:00
tangxifan 57a378ae59 [test] typo 2024-07-07 22:35:14 -07:00
tangxifan f784e58383 [test] typo 2024-07-07 22:33:45 -07:00
tangxifan 1a5e2392fc [test] add a new testcase to validate clock network when perimeter cb is on 2024-07-07 22:32:13 -07:00
tangxifan db12532eb8 [test] typo 2024-07-07 21:41:39 -07:00
tangxifan 439de61fd0 [test] fixed a bug on ecb support 2024-07-07 14:00:11 -07:00
tangxifan 201b2555e5 [test] code format 2024-07-06 12:15:08 -07:00
tangxifan 43ca3ec747 [test] make arch pin loc for spread for perimeter cb validation 2024-07-06 12:11:31 -07:00
tangxifan a46820b7c1 [core] add a new test for bottom-left tile grouping 2024-07-05 18:00:37 -07:00
tangxifan fe73e03c69 [test] changing arch 2024-07-04 21:31:43 -07:00
tangxifan 4064c29d49 [test] updating arch for perimeter cb 2024-07-04 21:23:15 -07:00
tangxifan 5865aebf93 [test] add new arch 2024-07-04 21:12:26 -07:00
tangxifan a78fddc3cb [test] add a new testcase to validate perimeter cb 2024-07-03 19:59:24 -07:00
tangxifan 078fad1e74 [test] typo 2024-07-02 14:57:24 -07:00
tangxifan 7e461b09f8 [core] add missing file 2024-07-02 13:22:41 -07:00
tangxifan 1e7cca8ceb [arch] code format 2024-07-02 11:52:30 -07:00
tangxifan 29452a7442 [test] fixed a bug on out-of-date arch 2024-07-02 11:52:19 -07:00
tangxifan 9b5df76fd5 [test] fix a bug in arch 2024-07-02 09:33:16 -07:00
tangxifan e00312d29e [test] typo 2024-07-01 20:34:37 -07:00
tangxifan 1bfcf7574c [test] validate region and single syntax 2024-07-01 20:33:28 -07:00
tangxifan 28e3cb799e [test] update 2-clock arch and pcf 2024-06-29 17:40:20 -07:00
tangxifan 12c9686c27 [test] fixed some bugs on arch 2024-06-29 17:38:34 -07:00
tangxifan 5dd0549aed [core] typo 2024-06-29 17:17:54 -07:00