Clifford Wolf
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e3b11ea2d6
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Fixed bug in freduce command
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2014-03-07 18:44:23 +01:00 |
Clifford Wolf
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6f8865d81a
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Some minor code cleanups in freduce command
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2014-03-07 18:29:04 +01:00 |
Clifford Wolf
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620d51d9f7
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Bugfix in ilang frontend autoidx recovery
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2014-03-07 17:19:14 +01:00 |
Clifford Wolf
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f7bd0a5232
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Use log_abort() and log_assert() in BTOR backend
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2014-03-07 15:56:10 +01:00 |
Clifford Wolf
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54d74cf616
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Added freduce -dump
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2014-03-06 22:06:58 +01:00 |
Clifford Wolf
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da5859a674
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Added freduce -stop
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2014-03-06 18:14:26 +01:00 |
Clifford Wolf
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4d07f88258
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Fixed gcc compiler warning
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2014-03-06 16:37:19 +01:00 |
Clifford Wolf
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9b9c3327cc
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Fixed undef handling in opt_reduce
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2014-03-06 14:18:34 +01:00 |
Clifford Wolf
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973507d85b
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Fixes for improved techmap of shifts with large B inputs
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2014-03-06 13:33:12 +01:00 |
Clifford Wolf
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97710ffad5
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Fixed use of frozen literals in SatGen
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2014-03-06 13:08:44 +01:00 |
Clifford Wolf
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8406e7f7b6
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Strictly zero-extend unsigned A-inputs of shift operations in techmap
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2014-03-06 12:15:44 +01:00 |
Clifford Wolf
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1ecaf1bb76
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Added techmap -max_iter option
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2014-03-06 12:15:17 +01:00 |
Clifford Wolf
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d7f29bb23f
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Improved techmap of shift with wide B inputs
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2014-03-06 12:14:20 +01:00 |
Clifford Wolf
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a1bfde8c5e
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Strictly zero-extend unsigned A-inputs of shift operations
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2014-03-06 11:53:37 +01:00 |
Clifford Wolf
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b1b8fe3a56
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Switched to EZMINISAT_SIMPSOLVER as default SAT solver
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2014-03-05 19:57:10 +01:00 |
Clifford Wolf
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09805ee9ec
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Include id2ast pointers when dumping AST
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2014-03-05 19:56:31 +01:00 |
Clifford Wolf
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d6a01fe412
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Fixed merging of compatible wire decls in AST frontend
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2014-03-05 19:55:58 +01:00 |
Clifford Wolf
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de7bd12004
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Bugfix in recursive AST simplification
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2014-03-05 19:45:33 +01:00 |
Clifford Wolf
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96e753041d
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fixed freduce for Minisat::SimpSolver: use frozen_literal()
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2014-03-03 02:14:27 +01:00 |
Clifford Wolf
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d5bd93997c
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ezSAT: Added frozen_literal() API
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2014-03-03 02:13:17 +01:00 |
Clifford Wolf
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895e9fc70c
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ezSAT: Fixed handling of eliminated Literals, added auto-freeze for expressions
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2014-03-03 02:12:45 +01:00 |
Clifford Wolf
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d500bd749f
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Added ezSAT::eliminated API to help the SAT solver remember eliminated variables
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2014-03-01 21:00:34 +01:00 |
Clifford Wolf
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23f0a12c72
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ezSAT bugfix: don't call virtual methods in base class constructor
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2014-03-01 20:59:00 +01:00 |
Clifford Wolf
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edc2146056
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Removed ezSAT::assumed() API
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2014-03-01 20:55:06 +01:00 |
Clifford Wolf
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e3debea4e6
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Removed ezSAT built-in brute-froce solver
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2014-03-01 20:53:09 +01:00 |
Clifford Wolf
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ef90236a5d
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Fixed vhdl2verilog temp dir name
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2014-03-01 17:48:15 +01:00 |
Clifford Wolf
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04999f4af0
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Fixed vhdl2verilog help message
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2014-03-01 17:47:19 +01:00 |
Clifford Wolf
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9e99984336
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Fixed const folding of $bu0 cells
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2014-02-27 04:09:32 +01:00 |
Clifford Wolf
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ae5032af84
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Fixed bit-extending in $mux argument (use $bu0 instead of $pos)
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2014-02-26 21:32:19 +01:00 |
Clifford Wolf
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aaaa604853
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Added support for $bu0 to SatGen
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2014-02-26 21:31:34 +01:00 |
Clifford Wolf
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6bc94b7eb2
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Don't blow up constants unneccessarily in Verilog frontend
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2014-02-24 12:41:25 +01:00 |
Clifford Wolf
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dab1612f81
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Added support for Minisat::SimpSolver + ezSAT frezze() API
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2014-02-23 01:35:59 +01:00 |
Clifford Wolf
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b76528d8a5
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Fixed small memory leak in Pass::call()
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2014-02-23 01:28:29 +01:00 |
Clifford Wolf
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f8c9143b2b
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Fixed bug in generation of undefs for $memwr MUXes
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2014-02-22 17:08:00 +01:00 |
Clifford Wolf
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548519875b
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Fixed bug (typo) in passes/opt/opt_const.cc
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2014-02-22 17:07:22 +01:00 |
Clifford Wolf
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337b461d26
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Added $lut support to blif backend (by user eddiehung from reddit)
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2014-02-22 14:25:32 +01:00 |
Clifford Wolf
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357f3f6e93
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Added ezMiniSat EZMINISAT_INCREMENTAL compile-time option
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2014-02-22 11:34:31 +01:00 |
Clifford Wolf
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1ec01d8c63
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Made MiniSat solver backend configurable in ezminisat.h
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2014-02-22 01:29:02 +01:00 |
Clifford Wolf
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8b508dc90b
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Added workaround for vhdl-style edge triggers from vhdl2verilog to proc_arst
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2014-02-21 23:34:45 +01:00 |
Clifford Wolf
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0a60f95224
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Added vhdl2verilog
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2014-02-21 18:59:49 +01:00 |
Clifford Wolf
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79edcd4318
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Progress in presentation
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2014-02-21 14:59:59 +01:00 |
Clifford Wolf
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038eac7414
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Better handling of nameDef and nameRef in edif backend
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2014-02-21 13:40:43 +01:00 |
Clifford Wolf
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f3ff29d410
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Fixed instantiating multi-bit ports in edif backend
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2014-02-21 13:10:36 +01:00 |
Clifford Wolf
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3c5e973092
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Use private namespace in mem_simple_4x1_map
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2014-02-21 12:14:38 +01:00 |
Clifford Wolf
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81b3f52519
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Added tests/techmap/mem_simple_4x1
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2014-02-21 12:06:40 +01:00 |
Clifford Wolf
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79f8944811
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Renamed "write_blif -subckt" to "write_blif -icells" and added -gates and -param
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2014-02-21 10:40:15 +01:00 |
Clifford Wolf
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2aff7b2a47
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Progress in presentation
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2014-02-21 02:13:02 +01:00 |
Clifford Wolf
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9351e4d3ca
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Progress in presentation
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2014-02-20 23:44:28 +01:00 |
Clifford Wolf
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4e43cb7317
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Added _TECHMAP_REPLACE_ feature to techmap
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2014-02-20 23:42:07 +01:00 |
Clifford Wolf
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737b71c735
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Added "extract -ignore_parameters" and "extract -ignore_param ..."
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2014-02-20 23:31:13 +01:00 |