mirror of https://github.com/YosysHQ/yosys.git
fixed freduce for Minisat::SimpSolver: use frozen_literal()
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@ -112,13 +112,13 @@ struct FindReducedInputs
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size_t idx_bits = get_bits(idx);
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if (sat_pi_uniq_bitvec.size() != idx_bits) {
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sat_pi_uniq_bitvec.push_back(ez.literal(stringf("uniq_%d", int(idx_bits)-1)));
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sat_pi_uniq_bitvec.push_back(ez.frozen_literal(stringf("uniq_%d", int(idx_bits)-1)));
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for (auto &it : sat_pi)
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ez.assume(ez.OR(ez.NOT(it.second), ez.NOT(sat_pi_uniq_bitvec.back())));
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}
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log_assert(sat_pi_uniq_bitvec.size() == idx_bits);
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sat_pi[bit] = ez.literal(stringf("pi_%s", log_signal(bit)));
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sat_pi[bit] = ez.frozen_literal(stringf("p, falsei_%s", log_signal(bit)));
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ez.assume(ez.IFF(ez.XOR(sat_a, sat_b), sat_pi[bit]));
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for (size_t i = 0; i < idx_bits; i++)
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