Commit Graph

121 Commits

Author SHA1 Message Date
mo-hosni 1110ae2fe8 update housekeeping views and openlane configuration 2022-10-18 04:07:27 -07:00
Mohamed Shalan 3fbc52ecbf
Merge pull request #276 from efabless/caravel_redesign-digital_pll-fanout
reharden!: digital_pll
2022-10-17 20:50:01 +02:00
mo-hosni 2d147966b9 Update housekeeping views and openlane configuration 2022-10-17 11:37:24 -07:00
kareem e5d9788a43 reharden!: digital_pll
~ enable synth buffering to fix fanout
~ add *buf_1* to no synth list
~ add attribute (* keep *) to the oscillator as dont
touch for yosys

!need to verify that the oscillator remains untouched
2022-10-17 10:56:01 -07:00
kareem a8794dff4b reharden: caravel
~ reharden with updated pdn
~ add stubs for non functional blocks
2022-10-17 03:59:28 -07:00
M0stafaRady de11170ab2 fix syntax error at gl/gpio_signal_buffering.v 2022-10-17 00:55:12 -07:00
marwaneltoukhy 2d28c973ee added views for caravel with power routing 2022-10-16 19:08:56 -07:00
marwaneltoukhy 7ec1eeb010 Merge branch 'caravel_redesign' into caravel_redesign-top-level 2022-10-16 18:39:39 -07:00
Marwan Abbas 35ec52aa72
Merge pull request #260 from efabless/fix_top_buffers_again
More changes to the GPIO buffer cell
2022-10-17 03:35:25 +02:00
Tim Edwards 9f54b2ecec Added a gate-level version of gpio_signal_buffering derived from
the RTL, but cleaned up for macro definitions;  this can be used
for LVS.  The decap cells were hand-edited in because there is
no way to devine them from the RTL source.
2022-10-16 21:20:12 -04:00
kareem 2409207178 reharden: caravel
~ add non functional blocks - like caravel_motto
2022-10-16 15:44:27 -07:00
kareem 704f19b6c7 reharden: caravel
~ correct placement for spare_logic_block
~ add changes from buffering macro
2022-10-16 12:56:41 -07:00
M0stafaRady 0542485ae9 remove file buff_flash_clkrst.nl.v 2022-10-16 09:57:54 -07:00
M0stafaRady 8526aadd4a Revert "remove unpowered netlist"
This reverts commit dd482cb099.
2022-10-16 09:56:24 -07:00
kareem fc0701003c reharden: caravel
- based on second iteration of the buffer macro
- change config with updated placement of spare logic macros
and power routing cell
2022-10-16 06:58:46 -07:00
mo-hosni 22dde425ac add mgmt_protect views and openlane files 2022-10-16 03:14:55 -07:00
Passant dd482cb099 remove unpowered netlist 2022-10-15 13:46:21 -07:00
kareem 5d5d019ea1 Revert "add buff_flash_clkrst"
This reverts commit 2675487322.
2022-10-15 08:47:02 -07:00
mo-hosni 2675487322 add buff_flash_clkrst 2022-10-15 06:38:42 -07:00
mo-hosni 3361c8787d Add mgmt_protect views and openlane files 2022-10-15 01:46:22 -07:00
mo-hosni 0e01725608 add housekeeping views 2022-10-14 09:26:34 -07:00
Passant 4609abd7e2 remove unpowered gate level netlist 2022-10-14 02:42:37 -07:00
kareem 6452f14de0 reimplement caravel with latest blocks updates and a buffer macro 2022-10-13 13:34:47 -07:00
Marwan Abbas f7299933ee
Merge pull request #217 from mo-hosni/buff_flash_clkrst
Buff flash clkrst
2022-10-13 20:53:18 +02:00
Marwan Abbas 14856fea6d
Merge pull request #216 from mo-hosni/housekeeping_final_views
Housekeeping final views
2022-10-13 20:47:09 +02:00
passant5 acd6aeb0dc
Delete housekeeping.nl.v 2022-10-13 20:35:24 +02:00
Marwan Abbas e72f819020
Merge pull request #210 from mo-hosni/final_views
mgmt_protect final views
2022-10-13 20:33:57 +02:00
passant5 dd2c99b3de
Delete mgmt_protect.nl.v 2022-10-13 20:31:42 +02:00
Marwan Abbas 08ac55bed8
Merge pull request #214 from efabless/caravel_clocking-buffering
Caravel clocking reharden
2022-10-13 20:13:45 +02:00
passant5 9b009167a4
Delete mgmt_protect.nl.v 2022-10-13 20:09:00 +02:00
kareem c922241c3f reharden: caravel_clocking
+ add custom interactive script to insert a buffer on user_clk output
and have a large buffer on core_clk
~ change pdn config to match top level
~ change sdc
~ change openlane configuration
2022-10-13 10:54:04 -07:00
mo-hosni 889aa7e308 add buff_flash_clkrst 2022-10-13 10:35:51 -07:00
mo-hosni 0389423ea6 add housekeeping 2022-10-13 10:15:05 -07:00
mo-hosni 1aaebf5cbb add mgmt_protect 2022-10-13 10:11:45 -07:00
kareem 59743f4832 change buf16 to clkbuf16 and reimplement 2022-10-13 06:54:55 -07:00
kareem 0eed96f33f reharden: digital_pll
~ reimplement digital_pll using updated RTL
~ changes in config to generate same PDN
~ change deprecated variables
2022-10-13 06:21:08 -07:00
kareem 8c95a58e0d ~ regenerate chip_io netlist to fix missing power pins from constant blocks 2022-10-12 11:40:05 -07:00
kareem 9ccb0ff2ed reharden!: caravel
~ reimplement based on updated views of the macros
~ change interactive script to call label_macro_pins
~ extract all spef and sdf corners using timing-scripts repo

!important same work arounds as before
2022-10-12 04:45:08 -07:00
mo-hosni db2cc848b2 Added constant block openlane files and powered gl and modified housekeeping config.tcl 2022-10-12 04:12:27 -07:00
mo-hosni 76f8d37496 Rehardened housekeeping to fix Antenna violations. 2022-10-11 16:41:50 -07:00
kareem b0abb4e164 add chip_io gl
~ update interactive script for chip_io.v for recent openlane
~ update config.tcl for recent openlane
~ add a verilog stub for sky130_fd_io__top_xres4v2 as
the io verilog models are not readable by yosys
2022-10-11 07:35:13 -07:00
Mohamed Hosni ee17bcf177
Merge branch 'efabless:caravel_redesign' into caravel_redesign 2022-10-11 01:47:06 -07:00
mo-hosni df05079b6f update houskeepong powere netlst and fixed some antenna violations 2022-10-11 01:46:23 -07:00
mo-hosni e1b2509aad update mgmt_protect gl to be powered 2022-10-11 01:40:51 -07:00
Mohamed Shalan 344f806980
Merge pull request #166 from efabless/gpio_control_block-sparecell
gpio_control_block sparecell
2022-10-11 10:39:50 +02:00
kareem f4218ddde9 reharden!: gpio_control_block
- reimplement using a sparecell
- reimplement using newest open_pdks

!important using openlane pre odb with some local patches which
most if not all are merged in the current head of openlane however
still takes effort to update the interactive script to be latest
openlane compatible

!important override abstract lef generated by openlane. openlane
 generates lef and mag that contain def BLOCKAGE layers that cause
congestions during top level routing
2022-10-10 05:42:29 -07:00
Mohamed Hosni 40098f693e
Merge branch 'efabless:caravel_redesign' into caravel_redesign 2022-10-10 05:08:33 -07:00
kareem 285ef6b642 reharden!: caravel
~ update the following views:
def
mag
verilog
spef(all corners)
+ add the ability to override the interactive script filename
+ add the ability to run openlane regression using regression.config
file
~ change GRT ADJUSTMENT values
~ change pointers to some files for workarounds

!important the interactive script still needs updates
!important this was done using old openlane v0.22 and its matching
pdk
!important known workarounds:
- a custom techlef is used where large metal spacing rules are the
only ones present to avoid violations by the router
- some odd behaviour happening when a macro has a lef view
with a non zero origin. so the power routing cell is (temporarily)
modified to have a zero origin and its placement has been shifted
which doesn't match the power routing mag.
- the old openlane doesn't generate multi spef corners. they
are generated using timing-scripts repo
2022-10-10 04:51:05 -07:00
mo-hosni 7a7690ba10 Update housekeeping 2022-10-10 01:21:51 -07:00
mo-hosni 7e5891dd9f Update mgmt_protect 2022-10-10 01:19:40 -07:00