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caravel
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reharden!: caravel 

~ reimplement based on updated views of the macros
~ change interactive script to call label_macro_pins
~ extract all spef and sdf corners using timing-scripts repo

!important same work arounds as before
This commit is contained in:
kareem 2022-10-12 04:45:08 -07:00
parent ecfc18151a
commit 9ccb0ff2ed
17 changed files with 260184 additions and 104758 deletions
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@ -26,6 +26,9 @@ prep -design $SCRIPT_DIR -tag caravel_lvs -overwrite --verbose 2
set ::env(SYNTH_DEFINES) "USE_POWER_PINS"
verilog_elaborate
set ::env(CURRENT_SDC) $::env(BASE_SDC_FILE)
init_floorplan
file copy -force $::env(CURRENT_DEF) $::env(TMP_DIR)/lvs.def
file copy -force $::env(CURRENT_NETLIST) $::env(TMP_DIR)/lvs.v
prep -ignore_mismatches -design $SCRIPT_DIR -tag $::env(OPENLANE_RUN_TAG) -overwrite -verbose 2
@ -38,6 +41,9 @@ exec rm -rf $SCRIPT_DIR/runs/caravel
exec ln -sf $SCRIPT_DIR/runs/$::env(OPENLANE_RUN_TAG) $SCRIPT_DIR/runs/caravel
file copy -force $::env(CARAVEL_ROOT)/openlane/caravel/runs/caravel_lvs/tmp/lvs.v $::env(RUN_DIR)/caravel.v
file copy -force $::env(CARAVEL_ROOT)/openlane/caravel/runs/caravel_lvs/tmp/lvs.def $::env(RUN_DIR)/lvs.def
file copy $::env(CARAVEL_ROOT)/openlane/caravel/runs/caravel_lvs/tmp/merged_unpadded.lef $::env(RUN_DIR)/lvs.lef
set ::env(SYNTH_DEFINES) "TOP_ROUTING"
verilog_elaborate
@ -229,18 +235,10 @@ global_routing
detailed_routing
li1_hack_end
remove_component -input $::env(CURRENT_DEF) -instance_name obs_li1
run_magic
save_views -def_path $::env(CURRENT_DEF) \
-gds_path $::env(magic_result_file_tag).gds \
-mag_path $::env(magic_result_file_tag).mag \
-verilog_path $::env(RUN_DIR)/caravel.v \
-save_path $save_path \
-tag caravel
exit
label_macro_pins\
-lef $::env(TMP_DIR)/lvs.lef\
-netlist_def $::env(TMP_DIR)/lvs.def
-lef $::env(RUN_DIR)/lvs.lef\
-netlist_def $::env(RUN_DIR)/lvs.def
# -extra_args {-v\
# --map padframe vddio vddio INOUT\
# --map padframe vssio vssio INOUT\
@ -248,7 +246,15 @@ label_macro_pins\
# --map padframe vccd vccd INOUT\
# --map padframe vssd vssd INOUT}
save_views -def_path $::env(CURRENT_DEF) \
-gds_path $::env(magic_result_file_tag).gds \
-mag_path $::env(magic_result_file_tag).mag \
-verilog_path $::env(RUN_DIR)/caravel.v \
-save_path $save_path \
-tag caravel
run_magic
exit
run_magic_spice_export

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verilog/gl/caravel.v
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@ -5059,79 +5059,6 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
.VPWR(vccd_core),
.mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0] })
);
assign \gpio_load_1_shifted[18] = \gpio_load_1[17] ;
assign \gpio_load_1_shifted[17] = \gpio_load_1[16] ;
assign \gpio_load_1_shifted[16] = \gpio_load_1[15] ;
assign \gpio_load_1_shifted[15] = \gpio_load_1[14] ;
assign \gpio_load_1_shifted[14] = \gpio_load_1[13] ;
assign \gpio_load_1_shifted[13] = \gpio_load_1[12] ;
assign \gpio_load_1_shifted[12] = \gpio_load_1[11] ;
assign \gpio_load_1_shifted[11] = \gpio_load_1[10] ;
assign \gpio_load_1_shifted[10] = \gpio_load_1[9] ;
assign \gpio_load_1_shifted[9] = \gpio_load_1[8] ;
assign \gpio_load_1_shifted[8] = \gpio_load_1[7] ;
assign \gpio_load_1_shifted[7] = \gpio_load_1[6] ;
assign \gpio_load_1_shifted[6] = \gpio_load_1[5] ;
assign \gpio_load_1_shifted[5] = \gpio_load_1[4] ;
assign \gpio_load_1_shifted[4] = \gpio_load_1[3] ;
assign \gpio_load_1_shifted[3] = \gpio_load_1[2] ;
assign \gpio_load_1_shifted[2] = \gpio_load_1[1] ;
assign \gpio_load_1_shifted[1] = \gpio_load_1[0] ;
assign \gpio_serial_link_2_shifted[17] = \gpio_serial_link_2[18] ;
assign \gpio_serial_link_2_shifted[16] = \gpio_serial_link_2[17] ;
assign \gpio_serial_link_2_shifted[15] = \gpio_serial_link_2[16] ;
assign \gpio_serial_link_2_shifted[14] = \gpio_serial_link_2[15] ;
assign \gpio_serial_link_2_shifted[13] = \gpio_serial_link_2[14] ;
assign \gpio_serial_link_2_shifted[12] = \gpio_serial_link_2[13] ;
assign \gpio_serial_link_2_shifted[11] = \gpio_serial_link_2[12] ;
assign \gpio_serial_link_2_shifted[10] = \gpio_serial_link_2[11] ;
assign \gpio_serial_link_2_shifted[9] = \gpio_serial_link_2[10] ;
assign \gpio_serial_link_2_shifted[8] = \gpio_serial_link_2[9] ;
assign \gpio_serial_link_2_shifted[7] = \gpio_serial_link_2[8] ;
assign \gpio_serial_link_2_shifted[6] = \gpio_serial_link_2[7] ;
assign \gpio_serial_link_2_shifted[5] = \gpio_serial_link_2[6] ;
assign \gpio_serial_link_2_shifted[4] = \gpio_serial_link_2[5] ;
assign \gpio_serial_link_2_shifted[3] = \gpio_serial_link_2[4] ;
assign \gpio_serial_link_2_shifted[2] = \gpio_serial_link_2[3] ;
assign \gpio_serial_link_2_shifted[1] = \gpio_serial_link_2[2] ;
assign \gpio_serial_link_2_shifted[0] = \gpio_serial_link_2[1] ;
assign \gpio_resetn_2_shifted[18] = \gpio_resetn_1_shifted[0] ;
assign \gpio_resetn_2_shifted[17] = \gpio_resetn_2[18] ;
assign \gpio_resetn_2_shifted[16] = \gpio_resetn_2[17] ;
assign \gpio_resetn_2_shifted[15] = \gpio_resetn_2[16] ;
assign \gpio_resetn_2_shifted[14] = \gpio_resetn_2[15] ;
assign \gpio_resetn_2_shifted[13] = \gpio_resetn_2[14] ;
assign \gpio_resetn_2_shifted[12] = \gpio_resetn_2[13] ;
assign \gpio_resetn_2_shifted[11] = \gpio_resetn_2[12] ;
assign \gpio_resetn_2_shifted[10] = \gpio_resetn_2[11] ;
assign \gpio_resetn_2_shifted[9] = \gpio_resetn_2[10] ;
assign \gpio_resetn_2_shifted[8] = \gpio_resetn_2[9] ;
assign \gpio_resetn_2_shifted[7] = \gpio_resetn_2[8] ;
assign \gpio_resetn_2_shifted[6] = \gpio_resetn_2[7] ;
assign \gpio_resetn_2_shifted[5] = \gpio_resetn_2[6] ;
assign \gpio_resetn_2_shifted[4] = \gpio_resetn_2[5] ;
assign \gpio_resetn_2_shifted[3] = \gpio_resetn_2[4] ;
assign \gpio_resetn_2_shifted[2] = \gpio_resetn_2[3] ;
assign \gpio_resetn_2_shifted[1] = \gpio_resetn_2[2] ;
assign \gpio_resetn_2_shifted[0] = \gpio_resetn_2[1] ;
assign \gpio_serial_link_1_shifted[18] = \gpio_serial_link_1[17] ;
assign \gpio_serial_link_1_shifted[17] = \gpio_serial_link_1[16] ;
assign \gpio_serial_link_1_shifted[16] = \gpio_serial_link_1[15] ;
assign \gpio_serial_link_1_shifted[15] = \gpio_serial_link_1[14] ;
assign \gpio_serial_link_1_shifted[14] = \gpio_serial_link_1[13] ;
assign \gpio_serial_link_1_shifted[13] = \gpio_serial_link_1[12] ;
assign \gpio_serial_link_1_shifted[12] = \gpio_serial_link_1[11] ;
assign \gpio_serial_link_1_shifted[11] = \gpio_serial_link_1[10] ;
assign \gpio_serial_link_1_shifted[10] = \gpio_serial_link_1[9] ;
assign \gpio_serial_link_1_shifted[9] = \gpio_serial_link_1[8] ;
assign \gpio_serial_link_1_shifted[8] = \gpio_serial_link_1[7] ;
assign \gpio_serial_link_1_shifted[7] = \gpio_serial_link_1[6] ;
assign \gpio_serial_link_1_shifted[6] = \gpio_serial_link_1[5] ;
assign \gpio_serial_link_1_shifted[5] = \gpio_serial_link_1[4] ;
assign \gpio_serial_link_1_shifted[4] = \gpio_serial_link_1[3] ;
assign \gpio_serial_link_1_shifted[3] = \gpio_serial_link_1[2] ;
assign \gpio_serial_link_1_shifted[2] = \gpio_serial_link_1[1] ;
assign \gpio_serial_link_1_shifted[1] = \gpio_serial_link_1[0] ;
assign \gpio_clock_1_shifted[18] = \gpio_clock_1[17] ;
assign \gpio_clock_1_shifted[17] = \gpio_clock_1[16] ;
assign \gpio_clock_1_shifted[16] = \gpio_clock_1[15] ;
@ -5150,25 +5077,24 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
assign \gpio_clock_1_shifted[3] = \gpio_clock_1[2] ;
assign \gpio_clock_1_shifted[2] = \gpio_clock_1[1] ;
assign \gpio_clock_1_shifted[1] = \gpio_clock_1[0] ;
assign \gpio_clock_2_shifted[18] = \gpio_clock_1_shifted[0] ;
assign \gpio_clock_2_shifted[17] = \gpio_clock_2[18] ;
assign \gpio_clock_2_shifted[16] = \gpio_clock_2[17] ;
assign \gpio_clock_2_shifted[15] = \gpio_clock_2[16] ;
assign \gpio_clock_2_shifted[14] = \gpio_clock_2[15] ;
assign \gpio_clock_2_shifted[13] = \gpio_clock_2[14] ;
assign \gpio_clock_2_shifted[12] = \gpio_clock_2[13] ;
assign \gpio_clock_2_shifted[11] = \gpio_clock_2[12] ;
assign \gpio_clock_2_shifted[10] = \gpio_clock_2[11] ;
assign \gpio_clock_2_shifted[9] = \gpio_clock_2[10] ;
assign \gpio_clock_2_shifted[8] = \gpio_clock_2[9] ;
assign \gpio_clock_2_shifted[7] = \gpio_clock_2[8] ;
assign \gpio_clock_2_shifted[6] = \gpio_clock_2[7] ;
assign \gpio_clock_2_shifted[5] = \gpio_clock_2[6] ;
assign \gpio_clock_2_shifted[4] = \gpio_clock_2[5] ;
assign \gpio_clock_2_shifted[3] = \gpio_clock_2[4] ;
assign \gpio_clock_2_shifted[2] = \gpio_clock_2[3] ;
assign \gpio_clock_2_shifted[1] = \gpio_clock_2[2] ;
assign \gpio_clock_2_shifted[0] = \gpio_clock_2[1] ;
assign \gpio_serial_link_2_shifted[17] = \gpio_serial_link_2[18] ;
assign \gpio_serial_link_2_shifted[16] = \gpio_serial_link_2[17] ;
assign \gpio_serial_link_2_shifted[15] = \gpio_serial_link_2[16] ;
assign \gpio_serial_link_2_shifted[14] = \gpio_serial_link_2[15] ;
assign \gpio_serial_link_2_shifted[13] = \gpio_serial_link_2[14] ;
assign \gpio_serial_link_2_shifted[12] = \gpio_serial_link_2[13] ;
assign \gpio_serial_link_2_shifted[11] = \gpio_serial_link_2[12] ;
assign \gpio_serial_link_2_shifted[10] = \gpio_serial_link_2[11] ;
assign \gpio_serial_link_2_shifted[9] = \gpio_serial_link_2[10] ;
assign \gpio_serial_link_2_shifted[8] = \gpio_serial_link_2[9] ;
assign \gpio_serial_link_2_shifted[7] = \gpio_serial_link_2[8] ;
assign \gpio_serial_link_2_shifted[6] = \gpio_serial_link_2[7] ;
assign \gpio_serial_link_2_shifted[5] = \gpio_serial_link_2[6] ;
assign \gpio_serial_link_2_shifted[4] = \gpio_serial_link_2[5] ;
assign \gpio_serial_link_2_shifted[3] = \gpio_serial_link_2[4] ;
assign \gpio_serial_link_2_shifted[2] = \gpio_serial_link_2[3] ;
assign \gpio_serial_link_2_shifted[1] = \gpio_serial_link_2[2] ;
assign \gpio_serial_link_2_shifted[0] = \gpio_serial_link_2[1] ;
assign \gpio_load_2_shifted[18] = \gpio_load_1_shifted[0] ;
assign \gpio_load_2_shifted[17] = \gpio_load_2[18] ;
assign \gpio_load_2_shifted[16] = \gpio_load_2[17] ;
@ -5188,6 +5114,62 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
assign \gpio_load_2_shifted[2] = \gpio_load_2[3] ;
assign \gpio_load_2_shifted[1] = \gpio_load_2[2] ;
assign \gpio_load_2_shifted[0] = \gpio_load_2[1] ;
assign \gpio_resetn_2_shifted[18] = \gpio_resetn_1_shifted[0] ;
assign \gpio_resetn_2_shifted[17] = \gpio_resetn_2[18] ;
assign \gpio_resetn_2_shifted[16] = \gpio_resetn_2[17] ;
assign \gpio_resetn_2_shifted[15] = \gpio_resetn_2[16] ;
assign \gpio_resetn_2_shifted[14] = \gpio_resetn_2[15] ;
assign \gpio_resetn_2_shifted[13] = \gpio_resetn_2[14] ;
assign \gpio_resetn_2_shifted[12] = \gpio_resetn_2[13] ;
assign \gpio_resetn_2_shifted[11] = \gpio_resetn_2[12] ;
assign \gpio_resetn_2_shifted[10] = \gpio_resetn_2[11] ;
assign \gpio_resetn_2_shifted[9] = \gpio_resetn_2[10] ;
assign \gpio_resetn_2_shifted[8] = \gpio_resetn_2[9] ;
assign \gpio_resetn_2_shifted[7] = \gpio_resetn_2[8] ;
assign \gpio_resetn_2_shifted[6] = \gpio_resetn_2[7] ;
assign \gpio_resetn_2_shifted[5] = \gpio_resetn_2[6] ;
assign \gpio_resetn_2_shifted[4] = \gpio_resetn_2[5] ;
assign \gpio_resetn_2_shifted[3] = \gpio_resetn_2[4] ;
assign \gpio_resetn_2_shifted[2] = \gpio_resetn_2[3] ;
assign \gpio_resetn_2_shifted[1] = \gpio_resetn_2[2] ;
assign \gpio_resetn_2_shifted[0] = \gpio_resetn_2[1] ;
assign \gpio_clock_2_shifted[18] = \gpio_clock_1_shifted[0] ;
assign \gpio_clock_2_shifted[17] = \gpio_clock_2[18] ;
assign \gpio_clock_2_shifted[16] = \gpio_clock_2[17] ;
assign \gpio_clock_2_shifted[15] = \gpio_clock_2[16] ;
assign \gpio_clock_2_shifted[14] = \gpio_clock_2[15] ;
assign \gpio_clock_2_shifted[13] = \gpio_clock_2[14] ;
assign \gpio_clock_2_shifted[12] = \gpio_clock_2[13] ;
assign \gpio_clock_2_shifted[11] = \gpio_clock_2[12] ;
assign \gpio_clock_2_shifted[10] = \gpio_clock_2[11] ;
assign \gpio_clock_2_shifted[9] = \gpio_clock_2[10] ;
assign \gpio_clock_2_shifted[8] = \gpio_clock_2[9] ;
assign \gpio_clock_2_shifted[7] = \gpio_clock_2[8] ;
assign \gpio_clock_2_shifted[6] = \gpio_clock_2[7] ;
assign \gpio_clock_2_shifted[5] = \gpio_clock_2[6] ;
assign \gpio_clock_2_shifted[4] = \gpio_clock_2[5] ;
assign \gpio_clock_2_shifted[3] = \gpio_clock_2[4] ;
assign \gpio_clock_2_shifted[2] = \gpio_clock_2[3] ;
assign \gpio_clock_2_shifted[1] = \gpio_clock_2[2] ;
assign \gpio_clock_2_shifted[0] = \gpio_clock_2[1] ;
assign \gpio_load_1_shifted[18] = \gpio_load_1[17] ;
assign \gpio_load_1_shifted[17] = \gpio_load_1[16] ;
assign \gpio_load_1_shifted[16] = \gpio_load_1[15] ;
assign \gpio_load_1_shifted[15] = \gpio_load_1[14] ;
assign \gpio_load_1_shifted[14] = \gpio_load_1[13] ;
assign \gpio_load_1_shifted[13] = \gpio_load_1[12] ;
assign \gpio_load_1_shifted[12] = \gpio_load_1[11] ;
assign \gpio_load_1_shifted[11] = \gpio_load_1[10] ;
assign \gpio_load_1_shifted[10] = \gpio_load_1[9] ;
assign \gpio_load_1_shifted[9] = \gpio_load_1[8] ;
assign \gpio_load_1_shifted[8] = \gpio_load_1[7] ;
assign \gpio_load_1_shifted[7] = \gpio_load_1[6] ;
assign \gpio_load_1_shifted[6] = \gpio_load_1[5] ;
assign \gpio_load_1_shifted[5] = \gpio_load_1[4] ;
assign \gpio_load_1_shifted[4] = \gpio_load_1[3] ;
assign \gpio_load_1_shifted[3] = \gpio_load_1[2] ;
assign \gpio_load_1_shifted[2] = \gpio_load_1[1] ;
assign \gpio_load_1_shifted[1] = \gpio_load_1[0] ;
assign \gpio_resetn_1_shifted[18] = \gpio_resetn_1[17] ;
assign \gpio_resetn_1_shifted[17] = \gpio_resetn_1[16] ;
assign \gpio_resetn_1_shifted[16] = \gpio_resetn_1[15] ;
@ -5206,9 +5188,27 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
assign \gpio_resetn_1_shifted[3] = \gpio_resetn_1[2] ;
assign \gpio_resetn_1_shifted[2] = \gpio_resetn_1[1] ;
assign \gpio_resetn_1_shifted[1] = \gpio_resetn_1[0] ;
assign \gpio_serial_link_1_shifted[17] = \gpio_serial_link_1[16] ;
assign \gpio_serial_link_1_shifted[11] = \gpio_serial_link_1[10] ;
assign \gpio_serial_link_1_shifted[14] = \gpio_serial_link_1[13] ;
assign \gpio_serial_link_1_shifted[13] = \gpio_serial_link_1[12] ;
assign \gpio_serial_link_1_shifted[5] = \gpio_serial_link_1[4] ;
assign \gpio_serial_link_1_shifted[12] = \gpio_serial_link_1[11] ;
assign \gpio_serial_link_1_shifted[7] = \gpio_serial_link_1[6] ;
assign \gpio_serial_link_1_shifted[18] = \gpio_serial_link_1[17] ;
assign \gpio_serial_link_1_shifted[15] = \gpio_serial_link_1[14] ;
assign \gpio_serial_link_1_shifted[1] = \gpio_serial_link_1[0] ;
assign \gpio_serial_link_1_shifted[16] = \gpio_serial_link_1[15] ;
assign \gpio_serial_link_1_shifted[2] = \gpio_serial_link_1[1] ;
assign \gpio_serial_link_1_shifted[8] = \gpio_serial_link_1[7] ;
assign \gpio_serial_link_1_shifted[10] = \gpio_serial_link_1[9] ;
assign \gpio_serial_link_1_shifted[9] = \gpio_serial_link_1[8] ;
assign \gpio_serial_link_1_shifted[6] = \gpio_serial_link_1[5] ;
assign mprj_io_loader_data_2 = \gpio_serial_link_2_shifted[18] ;
assign mprj_io_loader_data_1 = \gpio_serial_link_1_shifted[0] ;
assign mprj_io_loader_strobe = \gpio_load_1_shifted[0] ;
assign mprj_io_loader_clock = \gpio_clock_1_shifted[0] ;
assign mprj_io_loader_resetn = \gpio_resetn_1_shifted[0] ;
assign \gpio_serial_link_1_shifted[4] = \gpio_serial_link_1[3] ;
assign \gpio_serial_link_1_shifted[3] = \gpio_serial_link_1[2] ;
endmodule