4c6b923b74
[doc] add a figure about ecb
2024-05-21 11:03:58 -07:00
5775187072
[doc] enhance connection block details and restrictions
2024-05-21 10:55:13 -07:00
be1d7517c9
[doc] rework out-of-date syntax
2024-05-17 19:25:35 -07:00
79c5c0a26a
[doc] add more comments
2024-05-02 22:38:39 -07:00
f965595d17
[doc] add example file and file format details
2024-05-02 22:37:07 -07:00
e4998eebe0
[doc] add new options for write_fabric_hierarchy
2024-05-02 22:29:18 -07:00
dd577e37e0
LUTRAM Support ( #1595 )
...
* BRAM preload data - generic way to extract data from design
* Add docs and support special __layout__ case
* Add test
* Fix warning
* Change none-fabric to non-fabric
* LUTRAM Support Phase 1
* Add Test
* Add more protocol checking to enable LUTRAM feature
* Move the config setting under config protocol
* Revert any changes
---------
Co-authored-by: chungshien-chai <chungshien.chai@gmail.com>
2024-04-19 14:46:38 -07:00
dfc2626502
[doc] add hyperlinks
2024-04-11 15:46:52 -07:00
63128cb944
[doc] add new file format and new command as well as related options
2024-04-11 15:44:12 -07:00
f04e255b1f
[doc] add new option ``--dump_waveform``
2024-03-29 10:29:38 -07:00
4365d160ff
Support extracting data that is not affecting fabric bitstream ( #1566 )
...
* BRAM preload data - generic way to extract data from design
* Add docs and support special __layout__ case
* Add test
* Fix warning
* Change none-fabric to non-fabric
2024-03-09 17:38:31 -08:00
073161f523
[doc] add new option
2023-12-12 14:20:51 -08:00
2879bf2e6e
[doc] add new option
2023-12-08 13:56:46 -08:00
37352cf25c
Update fpga_bitstream_commands.rst with ref check marker.
2023-12-04 11:54:49 -08:00
04f2bdf5e3
Update repack_design_constraints.rst
...
Add subsections for each command.
2023-12-04 11:49:32 -08:00
26b2eb0970
add priority info to fpga_bitstream_commands.rst
2023-12-04 14:37:46 +08:00
9ffdcbff05
Update repack_design_constraints.rst
2023-12-04 14:05:03 +08:00
80102e1d8a
Update repack_design_constraints.rst
...
add explaination for new command: ignore_net
2023-12-01 15:52:29 +08:00
b79703fc8b
[doc] comment on new options
2023-11-14 10:10:41 -08:00
e9673916b2
[doc] add figures for new options in tileable rr graph
2023-11-14 09:56:57 -08:00
442dc9ddec
[doc] format
2023-11-02 21:27:12 -07:00
16f4e2938f
[doc] add new comand
2023-11-02 21:22:37 -07:00
2e6723d2a9
[doc] update for new options that are added to ``write_fabric_bitstream``
2023-10-06 19:32:42 -07:00
517be141ba
[doc] format
2023-09-26 18:37:49 -07:00
b56609d210
[doc] more details
2023-09-26 15:11:26 -07:00
262e47a922
[doc] update
2023-09-25 22:34:10 -07:00
c3443a288c
[doc] update doc for module rename assistant
2023-09-22 19:36:01 -07:00
1cf119f8d1
[doc] comment on the use of fpga_top and fpga_core
2023-09-18 20:48:06 -07:00
7e71f655df
[doc] typo
2023-09-17 13:46:54 -07:00
9e303e9529
[doc] update for renaming modules
2023-09-16 19:19:53 -07:00
3bc5c3b3b7
[doc] add links
2023-08-26 18:56:11 -07:00
f53e05f150
[doc] add utility tool: fabric key assistant
2023-08-26 18:46:43 -07:00
34f9067a2e
[doc] format
2023-08-22 15:51:37 +08:00
972ccd2d83
[doc] format
2023-08-22 15:51:00 +08:00
d9e3392194
[doc] add description about new option ``shrink_boundary``
2023-08-12 12:25:38 -07:00
4ed83cdb17
[doc] add missing file
2023-08-06 23:26:14 -07:00
d402d2322d
[doc] syntax
2023-08-06 23:24:59 -07:00
d579bdba39
[doc] add more explanation on grouped config block
2023-08-06 23:16:32 -07:00
48448be127
[doc] update figures to illustrate
2023-08-06 23:11:11 -07:00
2f079c7b92
[doc] update for newly added option
2023-07-31 17:33:09 -07:00
5ea9090714
[doc] update netlists to describe tile modules
2023-07-25 20:28:49 -07:00
589d73d7ae
[doc] add file format for tile config tile and new option to ``build_fabric`` command
2023-07-25 18:52:56 -07:00
7382ee30e2
[doc] typo
2023-07-09 10:30:32 -07:00
05a49278ed
[doc] update file format
2023-07-08 21:37:00 -07:00
8850212465
[doc] document new command and update file format about fabric_key
2023-07-08 19:10:46 -07:00
0112411101
[doc] hotfix
2023-06-26 12:26:41 -07:00
7974ea4426
[doc] update with example
2023-06-26 12:11:00 -07:00
df17f43024
[doc] update figure
2023-06-26 12:10:37 -07:00
7958f4beca
[doc] add figure
2023-06-26 11:54:28 -07:00
249964e98e
[doc] add documentation about the io naming rules
2023-06-26 11:31:02 -07:00
61544af2b4
[core] start adding new options
2023-06-21 14:01:00 -07:00
4b661cbd6a
[doc] update documentation about the new command
2023-06-18 21:08:08 -07:00
ff4e0a827f
[doc] add missing option for mock efpga wrapper command
2023-05-27 13:30:50 -07:00
d7837b8eeb
[doc] add documentation about mock fpga wrapper
2023-05-25 15:01:10 -07:00
76a553e7bc
[doc] supplementary description
2023-04-21 15:23:51 +08:00
c220438c42
[doc] adding new syntax that supports separated clocks for multi-head configuration chains
2023-04-21 15:21:34 +08:00
081620055b
[doc] fix broken links in the Clock Network file format
2023-04-21 13:58:13 +08:00
509f5eb6dc
[doc] add documentation about clock network description file
2023-04-20 17:06:53 +08:00
9756bfe0ca
[doc] document newly added commands for programmable clock arch support
2023-04-20 15:27:28 +08:00
55be8f491e
fix mux syntax in circuit_model_examples
...
the documentation is inconsistent about using underscores or dashes when describing a mux. It used one-level, but multi_level. Only underscores are valid in openfpga
2023-02-10 10:22:37 -07:00
9b109edaa1
[doc] added a new command
2023-01-11 17:14:06 -08:00
d48d7d6343
[doc] format fix
2023-01-01 17:28:55 -08:00
882682c30a
[doc] update for using batch_mode
2023-01-01 17:23:36 -08:00
e46397c91c
[doc] update doucmentation about new command source
2023-01-01 12:06:49 -08:00
5dfb3e6cb0
[doc] added an example about how to call vpr
2022-12-30 18:43:01 -08:00
492b8a153a
[doc] add documentation about vpr commands
2022-12-30 18:16:00 -08:00
e660880419
[doc] fixed bugs on small figure sizes shown
2022-12-06 17:20:46 -08:00
70b0d2e505
[doc] update pin table file format for pin direction keywords
2022-10-17 15:32:00 -07:00
aef94171c2
[doc] update options for pcf2place command
2022-10-17 13:55:18 -07:00
58487c7766
[doc] add more notes about the commmand ``pb_pin_fixup``
2022-09-29 11:01:07 -07:00
48f776d49b
[doc] update documentation about the new option
2022-09-12 16:58:32 -07:00
0609210b39
[doc] update doc with the new xml syntax
2022-09-08 17:00:16 -07:00
50813d90a2
[doc] update documentation based on the actual implementation on rr_gsb writer
2022-08-29 20:45:31 -07:00
12a30196e0
[engine] updating gsb writer; Unfinished!!!
2022-08-29 16:58:48 -07:00
adbc69f081
[doc] add new options for GSB writer
2022-08-29 14:16:51 -07:00
77abb86dab
[doc] update documentation about the activity file options
2022-08-01 21:37:22 -07:00
84dbcd61dd
[doc] fixed a few typo and format errors
2022-07-28 19:09:53 -07:00
c16bcd7f63
[doc] add file formates required by pcf2place
2022-07-28 16:35:13 -07:00
860591ff3f
[doc] add pcf file format to documentation
2022-07-28 16:15:44 -07:00
6e5fde56ce
[doc] add pcf2place to command list
2022-07-28 16:06:57 -07:00
2b4beb632c
[doc] fix a bug in including io information file format
2022-07-26 15:50:35 -07:00
bf2b1da801
[doc] add the new command file format to documentation
2022-07-26 14:06:07 -07:00
907308ee0f
[Doc] Update bitstream distribution file format
2022-03-29 20:09:24 +08:00
781250f0bb
Fix a small typo to trigger the CI flow.
2022-03-22 16:36:45 -07:00
6ff69d26b9
[Doc] An example to the documentation about the new feature in tile_annotation
2022-03-20 13:12:13 +08:00
123bb70cb3
[Doc] More explanantion on the use of config_enable attribute for circuit ports
2022-02-23 15:53:58 -08:00
b78e58d9bf
[Doc] Update doc about big endian syntax in bus group file format
2022-02-18 23:07:18 -08:00
8116141210
[Doc] Update documentation on the bus group feature
2022-02-18 15:46:25 -08:00
37d8617a5c
[Doc] Update due to new options
2022-02-17 19:45:37 -08:00
4a78bcf5d3
[Doc] update file format about bus group
2022-02-17 15:15:05 -08:00
796428d848
[Doc] Add documentation about bus group file format
2022-02-17 14:22:21 -08:00
2b5fded2a9
[Doc] Update documentation on the new option
2022-02-01 13:25:58 -08:00
b7b0a2a5d8
[Doc] Update doc about the new option
2022-02-01 12:19:26 -08:00
63f44adf15
[FPGA-Verilog] Now have a new option ``--use_relative_path``
2022-01-31 12:48:05 -08:00
a9a56686e2
[Engine] Add a new option ``--unique`` to command ``write_gsb_to_xml``
2022-01-26 11:10:29 -08:00
25143d07f1
[FPGA-Bitstream] Now has a new option ``--no_time_stamp`` to all the commands that output bitstream files
2022-01-25 13:37:54 -08:00
a4659020f2
Merge branch 'master' into time_stamp
2022-01-25 12:11:35 -08:00
62b57b05d2
[Engine] Now FPGA-Verilog commands have a new option ``--no_time_stamp``
2022-01-25 12:09:08 -08:00
758453f725
Moved 'verific_*' and 'yosys_*' config options from 'OpenFPGA_SHELL' to 'Synthesis Parameter' sections.
2022-01-21 02:21:00 +05:00
bd158311c5
Fixed typo in documentation and updated 'benchmark_sweep/iwls2005' task to use list of HDL files for 'iwls2005/ethernet' benchmark.
2022-01-18 14:07:41 +05:00
tangxifan
chungshien
Yitian4Debug
Jingrong Lin
Kyle Chuang
scott-temple
taoli4rs
Aram Kostanyan