[Doc] Update doc about the new option

2022-02-01 12:19:26 -08:00 · 2022-02-01 12:19:26 -08:00 · b7b0a2a5d8
parent f311a034bb
commit b7b0a2a5d8
1 changed files with 4 additions and 0 deletions
--- a/docs/source/manual/openfpga_shell/openfpga_commands/fpga_verilog_commands.rst
+++ b/docs/source/manual/openfpga_shell/openfpga_commands/fpga_verilog_commands.rst
@ -94,6 +94,10 @@ write_full_testbench

    Do not print time stamp in Verilog netlists

+  .. option:: --use_relative_path
+
+    Force to use relative path in netlists when including other netlists. By default, this is off, which means that netlists use absolute paths when including other netlists
+
  .. option:: --verbose

    Show verbose log