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[doc] add file format for tile config tile and new option to ``build_fabric`` command

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tangxifan 2023-07-25 18:52:56 -07:00
parent 83428a209e
commit 589d73d7ae
3 changed files with 10 additions and 0 deletions
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docs/source/manual/file_formats/figures/tile_style_top_left.png Normal file
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docs/source/manual/file_formats/index.rst
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@ -37,3 +37,5 @@ OpenFPGA widely uses XML format for interchangable files
clock_network
io_naming_file
tile_config_tile

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docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
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@ -252,6 +252,14 @@ build_fabric
.. option:: --compress_routing
Enable compression on routing architecture modules. Strongly recommend this as it will minimize the number of routing modules to be outputted. It can reduce the netlist size significantly.
.. option:: --group_tile <string>
Group fine-grained programmable blocks, connection blocks and switch blocks into tiles. Once enabled, tiles will be added to the top-level module. Otherwise, the top-level module consists of programmable blocks, connection blocks and switch blocks. The tile style can be customized through a file. See details in :ref:`file_formats_tile_config_file`.
.. warning:: This option does not support ``--duplicate_grid_pin``!
.. warning:: This option requires ``--compress_routing`` to be enabled!
.. option:: --duplicate_grid_pin