[Doc] Update documentation on the new option

2022-02-01 13:25:58 -08:00 · 2022-02-01 13:25:58 -08:00 · 2b5fded2a9
parent 1c94d0f285
commit 2b5fded2a9
1 changed files with 4 additions and 0 deletions
--- a/docs/source/manual/openfpga_shell/openfpga_commands/fpga_verilog_commands.rst
+++ b/docs/source/manual/openfpga_shell/openfpga_commands/fpga_verilog_commands.rst
@ -192,6 +192,10 @@ write_preconfigured_testbench

    Do not print time stamp in Verilog netlists

+  .. option:: --use_relative_path
+
+    Force to use relative path in netlists when including other netlists. By default, this is off, which means that netlists use absolute paths when including other netlists
+
  .. option:: --verbose

    Show verbose log