tangxifan
702bd3bbd5
Merge pull request #231 from lnis-uofu/dev
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Extended LUT Support: Now accept external LUT netlists with embedded custom logic
2021-02-11 13:57:17 -07:00
tangxifan
184788880c
Merge pull request #224 from lnis-uofu/gg_docs
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[Docs] Added documentation for docker based run and shell shortcuts documentation
2021-02-11 09:26:29 -07:00
tangxifan
c895422014
Merge pull request #234 from lnis-uofu/bump_yosys
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Bumping up latest checkins to yosys sub-module, related to adder_lut4…
2021-02-11 09:24:49 -07:00
Lalit Sharma
c495382416
Bumping up latest checkins to yosys sub-module, related to adder_lut4 inference
2021-02-10 22:22:58 -08:00
tangxifan
e683e00032
[HDL] Add disclaimer for the frac_lut4_arith HDL codes
2021-02-10 14:50:11 -07:00
tangxifan
1c4dc9f74b
[Doc] Update documentation about the super LUT feature
2021-02-10 11:49:59 -07:00
tangxifan
af4cc117fb
[Tool] bug fix in spypad lut
2021-02-09 22:53:18 -07:00
tangxifan
9b86f3bb85
Merge branch 'master' into dev
2021-02-09 22:40:45 -07:00
tangxifan
b2984b46ee
[Tool] Upgrade libopenfpga to support superLUT-related XML syntax
2021-02-09 21:15:57 -07:00
tangxifan
be24c904af
[Test] Add superLUT test case to CI
2021-02-09 21:15:21 -07:00
tangxifan
22e675148e
[HDL] Add HDL codes for a super LUT with embedded carry logic
2021-02-09 21:13:22 -07:00
tangxifan
b81b74aa7c
[Arch] Patch architecture to support superLUT-related XML syntax
2021-02-09 20:23:32 -07:00
tangxifan
6a0f4f354f
[Tool] Support superLUT circuit model in core engine
2021-02-09 20:23:05 -07:00
tangxifan
7dcc14d73f
[Arch] Bug fix in the example arch with super LUT
2021-02-09 15:52:22 -07:00
tangxifan
3ae501a5ea
[Test] Update test case to use dedicated eblif file
2021-02-09 15:51:57 -07:00
tangxifan
1712ee4edb
[Benchmark] Add a dedicated eblif to test the frac lut4 arith architecture
2021-02-09 15:41:21 -07:00
Nachiket Kapre
4c7f4bd82f
ahoy nice
2021-02-09 17:38:19 -05:00
tangxifan
2b51b36dd6
[Test] Now use the super LUT arch in the test case
2021-02-09 15:27:44 -07:00
tangxifan
56284059de
[Test] Add a test case for a super LUT
2021-02-09 15:25:32 -07:00
tangxifan
304b26c97f
[Arch] Add example architectures for superLUT circuit model
2021-02-09 15:11:12 -07:00
Nachiket Kapre
71c76df063
default to ns for time unit -- synopsys dc whines
2021-02-09 17:08:38 -05:00
Nachiket Kapre
6bb2e29f17
default to ns for time unit -- synopsys dc whines
2021-02-09 17:04:52 -05:00
Nachiket Kapre
87c69460df
what is going on
2021-02-09 11:33:08 -05:00
Nachiket Kapre
cc74c6268a
trying fix chan width
2021-02-09 11:28:19 -05:00
Nachiket Kapre
95fe4d7dae
adding dff synth
2021-02-09 10:34:54 -05:00
Nachiket Kapre
b14b5f975d
adding sweep for W
2021-02-09 08:48:25 -05:00
Nachiket Kapre
d7967da328
bugfix in alt
2021-02-08 23:04:00 -05:00
Nachiket Kapre
485708423c
no need for dff*, but need tap_buf4
2021-02-08 23:00:13 -05:00
Nachiket Kapre
cf154d8bb9
no need for dff*, but need tap_buf4
2021-02-08 22:29:55 -05:00
Nachiket Kapre
e14c0bf0c4
no need for dff*, but need tap_buf4
2021-02-08 22:28:42 -05:00
Nachiket Kapre
45437fbc46
no need for dff*, but need tap_buf4
2021-02-08 22:27:57 -05:00
Nachiket Kapre
853bf8af43
typos fixed;
2021-02-08 22:03:14 -05:00
Nachiket Kapre
d040ba569c
merge for consideration;
2021-02-08 21:29:34 -05:00
Nachiket Kapre
94f858fcde
merge for consideration;
2021-02-08 21:27:01 -05:00
Nachiket Kapre
0c6d27cf7e
merge for consideration;
2021-02-08 21:26:48 -05:00
Nachiket Kapre
b4185f7e8c
Merge branch 'master' of github.com:lnis-uofu/OpenFPGA
2021-02-08 21:11:30 -05:00
Nachiket Kapre
2344cdcabc
merge
2021-02-08 21:11:28 -05:00
Ganesh Gore
c2b68606c9
[Bugfix] Added shell globstar
2021-02-08 14:07:01 -07:00
tangxifan
1ce94040da
Merge pull request #221 from lnis-uofu/flow_dev
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[Flow] Support multi-user environment for running task
2021-02-08 12:43:57 -07:00
Ganesh Gore
6761df6d9d
[Bugfix] Reverted setting OPENFPGA_PATH
2021-02-08 12:36:50 -07:00
Ganesh Gore
7b8fd55916
[Bugfix] Task name in regression flow
2021-02-08 12:06:36 -07:00
Ganesh Gore
12e4fa07a2
[bugfix] OPENFPGA_PATH location
2021-02-08 11:57:15 -07:00
Ganesh Gore
9c5e1b1478
[CI] Updated test
2021-02-08 11:11:00 -07:00
Ganesh Gore
18070954d8
[CI] Moved test to basic test
2021-02-08 10:20:57 -07:00
tangxifan
80a4872ba0
Merge pull request #222 from lnis-uofu/gg_cleanup
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[Flow] ACE is optional during flow script, only runs when power estimation is on
2021-02-08 10:08:47 -07:00
Ganesh Gore
c35cf72489
[Docs] Added OpenFPGA shortcut commands docs
2021-02-07 23:53:05 -07:00
Ganesh Gore
cbd2064f59
[Docs] Updated docker based run documentation
2021-02-07 23:33:25 -07:00
Ganesh Gore
080d21c9f1
[Flow] Updated shortcuts shell script
2021-02-07 22:35:13 -07:00
Ganesh Gore
ede5f8ed58
[Flow] Support multi-user enviroment for running task
2021-02-07 22:11:04 -07:00
tangxifan
9020577e80
Support SVG in Sphinx Latex building ( #220 )
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* [Doc] Try use image converter instead of svg2pdf which requires more dependencies
* [Doc] Add img converter to conf.py
* [Doc] Bug fix in importing imgconverter package
* [Doc] Try to fix the bug when importing python packages
* [Doc] bug fix
* [Doc] Try to use imgconverter rather than cairo
* [Doc] Add svg to latex config in sphinx configuration file
* [Doc] Try cairo svg converter
* [Doc] Correct bugs in compiling latexpdf
* [Doc] Use latest image in building readthedocs
* [Doc] Now use readthedocs docker image in building online documentation
* [Doc] Correct typo in readthedocs setting
* [Doc] Try to use inkscape converter as imgconverter converted SVG to black images
* [Doc] Try RSVG
2021-02-07 18:53:16 -07:00