Ganesh Gore
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a880802803
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Bug Fix: Corrected read VPR stat filename
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2019-11-01 20:51:05 -06:00 |
tangxifan
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e2b042c61c
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Merge branch 'ganesh_dev' of https://github.com/LNIS-Projects/OpenFPGA into refactoring
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2019-11-01 18:27:27 -06:00 |
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Ganesh Gore
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370a5ed408
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Bug Fix: shifter ff.v include path to tcl script
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2019-11-01 18:22:40 -06:00 |
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Ganesh Gore
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595d2d3070
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Simple argument shuffle
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2019-11-01 18:21:26 -06:00 |
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Ganesh Gore
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27005d6640
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Added Modelsim Python Script
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2019-11-01 18:20:40 -06:00 |
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tangxifan
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49bfb3223c
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add compact routing to regression test
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2019-11-01 10:53:47 -06:00 |
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tangxifan
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531cc064fc
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bug fixing for formal top-level testbench
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2019-11-01 10:47:40 -06:00 |
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Ganesh Gore
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da0778e813
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Merge remote-tracking branch 'lnis_origin/refactoring' into ganesh_dev
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2019-11-01 00:46:34 -06:00 |
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tangxifan
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d709868463
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adding more regression tests which is quick run but very helpful for debugging
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2019-10-31 20:17:40 -06:00 |
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tangxifan
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a6a3e7c36b
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adding mcnc_big20 to regression test
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2019-10-31 19:31:27 -06:00 |
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Ganesh Gore
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81180939ca
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Bug fix: Missing exit_if_fail flag in fpga_flow script
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2019-10-31 09:56:57 -06:00 |
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tangxifan
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5531422186
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update regression test with no-explicit port mapping cases
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2019-10-30 19:37:06 -06:00 |
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tangxifan
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55fbd72293
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many bugs have been fixed
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2019-10-30 15:50:42 -06:00 |
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tangxifan
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4398cffaaa
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single mode is working, multi-mode is under debugging
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2019-10-29 22:32:36 -06:00 |
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tangxifan
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10491c4291
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bring single mode test case online with bug fixing
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2019-10-28 17:04:10 -06:00 |
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tangxifan
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5cb3717433
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add single mode test case to regression test. debugging now
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2019-10-28 15:57:17 -06:00 |
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Ganesh Gore
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c034b871bb
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Made activity file independent of power option
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2019-10-15 16:08:25 -06:00 |
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Ganesh Gore
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eaf8ecee86
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added _vpr.txt subscript to vpr log files
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2019-10-15 16:07:34 -06:00 |
Baudouin Chauviere
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027272c976
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Faster regression test
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2019-10-05 12:10:55 -06:00 |
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Baudouin Chauviere
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db059af8b8
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Lighten the regression test
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2019-10-03 13:33:28 -06:00 |
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Baudouin Chauviere
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c7e1f7d90b
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Added explicit_verilog to regression test in a clean way
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2019-10-03 10:17:04 -06:00 |
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Baudouin Chauviere
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33e50bbc8c
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fix
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2019-10-01 16:54:16 -06:00 |
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Baudouin Chauviere
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7c3ab38410
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Hot fix
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2019-10-01 16:40:16 -06:00 |
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Ganesh Gore
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069f628bb0
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Merge branch 'dev' of github.com:LNIS-Projects/OpenFPGA into ganesh_dev
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2019-09-28 11:21:37 -06:00 |
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Ganesh Gore
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d269472daf
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Updated formality python script
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2019-09-27 14:00:57 -06:00 |
AurelienUoU
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feddcbcb21
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Merge remote-tracking branch 'origin/dev' into heterogeneous
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2019-09-23 11:41:38 -06:00 |
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tangxifan
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5efea159c5
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Simplify part of regression test to min_route_chan_width
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2019-09-22 11:14:33 -06:00 |
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Ganesh Gore
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1dffe54807
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-22 00:21:25 -06:00 |
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Ganesh Gore
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50039a4b6e
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Added remove run directory option
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2019-09-21 23:35:56 -06:00 |
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AurelienUoU
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cc0bfdd548
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Add testcase in regression test for architecture with 1 IO cell/IO block
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2019-09-20 10:27:26 -06:00 |
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tangxifan
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4e7af5cdc5
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update tileable_routing test
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2019-09-18 15:59:32 -06:00 |
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tangxifan
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0f0d06aad7
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add non-LUT intermediate buffer to test and apply minor bug fix
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2019-09-18 15:04:51 -06:00 |
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Ganesh Gore
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8afcba2c45
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-18 12:15:42 -06:00 |
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Ganesh Gore
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cd5fd6ce6c
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Added explicit checking to VVP execution
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2019-09-18 12:14:26 -06:00 |
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Ganesh Gore
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56c40ca06d
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-17 22:12:11 -06:00 |
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Ganesh Gore
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169732ccc1
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Added verbose option in VVP output
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2019-09-17 22:09:37 -06:00 |
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tangxifan
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d7ac7d3649
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start refactoring the switch block verilog generation
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2019-09-17 20:40:26 -06:00 |
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Ganesh Gore
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7be83235a0
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-16 21:25:26 -06:00 |
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Ganesh Gore
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678e3181ba
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Made compact_routing_hierarchy options uncond
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2019-09-16 21:22:13 -06:00 |
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tangxifan
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5abbfd6a0f
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add tileable routing to regression test
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2019-09-16 20:45:02 -06:00 |
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Ganesh Gore
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81b9c5b266
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Added flag for VVP exit code
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2019-09-14 12:35:47 -06:00 |
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Ganesh Gore
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d90329678a
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Merge remote-tracking branch 'lnis_origin/dev' into ganesh_dev
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2019-09-14 12:11:36 -06:00 |
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Ganesh Gore
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ec3854a648
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-14 00:14:17 -06:00 |
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Ganesh Gore
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e5c99c8b12
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Quick terminate on fail added
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2019-09-13 23:56:38 -06:00 |
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Ganesh Gore
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bd9e57bc37
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Added better task name
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2019-09-13 23:30:42 -06:00 |
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Ganesh Gore
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a6e592247e
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Replaced options exit_on fail and show_thread logs
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2019-09-13 22:50:20 -06:00 |
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Ganesh Gore
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d64bb18346
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Separated Modelsim tcl script generation
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2019-09-07 12:36:22 -04:00 |
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Ganesh Gore
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d55b7e9497
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-06 11:49:38 -04:00 |
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Ganesh Gore
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bcbcd463fe
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Added pending runs in log
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2019-09-06 11:48:13 -04:00 |
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Ganesh Gore
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9abc1e1e7d
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-05 13:12:41 -04:00 |