Bug fix: Missing exit_if_fail flag in fpga_flow script

2019-10-31 09:56:57 -06:00 · 2019-10-31 09:56:57 -06:00 · 81180939ca
parent c034b871bb
commit 81180939ca
1 changed files with 1 additions and 1 deletions
--- a/openfpga_flow/scripts/run_fpga_flow.py
+++ b/openfpga_flow/scripts/run_fpga_flow.py
@ -836,7 +836,7 @@ def run_rewrite_verilog():
    run_command("Yosys", "yosys_output.txt", command)


-def run_netlists_verification():
+def run_netlists_verification(exit_if_fail=True):
    ExecTime["VerificationStart"] = time.time()
    compiled_file = "compiled_"+args.top_module
    # include_netlists = args.top_module+"_include_netlists.v"