There was an error in `dm_read`/`dm_write`: DMI address was checked
against DM registers disregarding DM base address.
To solve the issue `dmi_address()` function was introduced.
Change-Id: Ia3be619417b5f5b53db5dfe302db05170d6787c9
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
The motivalion for the change:
* `riscv_hart_count()` is used only once to print the value into the log
during exmination.
* The returned value is a bit confusing: it's not the total number of
targets on the TAP. It is the number of targets accessable through the
same DM. So the name of the function is misleading.
* This value is already reported on `-d3` level.
So the function seems redundant and can be safely removed.
Change-Id: Iac9021af59ba8dba2cfb6b9dd15eebc98fe42a08
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
The function is used for commands:
- jtag configure
- jtag cget
While there, add the missing .usage field.
Change-Id: I97ddc4898259ddb7fd2d057a997f33a6f4b0e2a8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8058
Tested-by: jenkins
clang build triggers an error for an uninitialized value of the
variable 'instr'.
This is a false positive, as the macro
#define MIPS32_CONFIG3_ISA_MASK (3 << MIPS32_CONFIG3_ISA_SHIFT)
guarantees the switch/case already covers all the possible values
with cases 0, 1, 2 and 3.
Silent clang by adding a useless default case to the switch.
While there, fix the indentation of the switch/case accordingly to
OpenOCD coding style.
Change-Id: I0ae316754ce7d091dd8366bf314b8e6ee780e313
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 7de4b1202d ("target/mips32: add cpu info detection")
Reviewed-on: https://review.openocd.org/c/openocd/+/8065
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Commit e370e06b72 ("target: Deprecate 'array2mem' and
'mem2array''") has already replaced the deprecated root versions
of commands mem2array and array2mem with TCL proc's that use
'read_memory' and 'write_memory'. It has left the deprecated code
of the target's version of the commands because the effort to code
the TCL replacement was not considered valuable.
To drop the last jim_handler commands, I consider much easier and
less error-prone to code them in TCL instead of converting the
deprecated code to COMMAND_HANDLER.
Drop the code in target.c and extend the TCL proc's.
While there, add the TCL procs to _telnet_autocomplete_skip.
Change-Id: I97d2370d8af479434ddf5af68541f90913982bc0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8052
Tested-by: jenkins
When requested by the core code (handle_breakpoints = true),
arc_resume() should be able to advance over a potential breakpoint set
at the resume address instead of getting stuck in one place. This is
achieved by removing the breakpoint, executing one instruction,
resetting the breakpoint, then proceeding forward as normal.
With this patch applied, openocd is now able to resume from a
breakpoint halt when debugging ARCv2 targets via telnet.
This has previously been committed to the Zephyr project's openocd repo
(see https://github.com/zephyrproject-rtos/openocd/pull/31).
Change-Id: I17dba0dcea311d394b303c587bc2dfaa99d67859
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7817
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Presently, we rely on gdb to restore break/watchpoints upon resuming
execution in arc_resume(). To match this behavior in absence of gdb
(more specifically, when handle_breakpoints is true), this patch
explicitly re-enables all breakpoints and watchpoints in arc_resume().
This has previously been committed to the Zephyr project's openocd repo
(see https://github.com/zephyrproject-rtos/openocd/pull/31).
Change-Id: I59e9c91270ef0b5fd19cfc570663dc67a6022dbd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7816
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
For Armv8.1-M based cores, detect if the core implements the optional
M-profile vector extension (MVE), using MVFR1 register.
While at there rework armv7m->fp_feature detection based on MVFR0
and MVFR1 registers.
Change-Id: I92d5b1759aea9f7561d285f46acdec51d6efb7b4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6950
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
In loops that typically take longer time to complete, check if there is
a pending shutdown request. If so, terminate the loop.
This allows to respond to a signal requesting a shutdown during some
loops which do not return control to main OpenOCD loop.
Change-Id: Iace0b58eddde1237832d0f9333a7c7b930565674
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Based on Daniel Goehring's [1] and Peter Collingbourne's [2] work.
Probe for support of 8, 16 bit and if the large data extension is available
also probe for 64, 128 and 256 bit operations.
Probe for the ability of packing 8 and 16 bit data
(formerly probed in mem_ap_init()). The probe is integrated to
mem_ap_read/write() routines and takes place just before the first memory
access of the specific size.
Add 64, 128 and 256 bit MEM-AP read/writes.
Introduce specific error codes for unsupported transfer size
and for unsupported packing.
Change-Id: I180c4ef17d2fc3189e8e2f14bafd22d857f29608
Link: 7191: target/adiv5: add MEM-AP 64-bit access support | https://review.openocd.org/c/openocd/+/7191
Link: 7436: arm_adi_v5: Support reads wider than 32 bits | https://review.openocd.org/c/openocd/+/7436
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7576
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Prevent packed writes with Nuvoton NPCX quirks because the workaround
uses all byte lanes for one byte or halfword and thus precludes packing.
Eliminate quirk code for size 4 as it is equivalent to the common code.
Make the quirk code for sizes 2 and 1 easier readable.
Change-Id: I72324e56a49b4712bd3769e03dce01427d9fcd73
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7575
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Introduce ti_be_lane_xor for byte lane correction
and use common code for both quirk and regular conversion.
The same lane correction takes place in both mem_ap_read/write()
- it was obfuscated in original code with different bitwise and arithmetic
operations.
Change-Id: I6a30672b908770323d30813a714e06ab8695fe26
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7574
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Update mips32 instructions, add barrier and sync related insts.
Add SYNC and barrier instruction blocks for memory access safety.
These instructions are not supported on Lexra and/or MIPSr1 CPUs,
detections were added and they will be executed conditionally.
Rework mips32_pracc_read/write_regs function.
Checkpatch-ignore: MACRO_ARG_REUSE
Change-Id: Ib14112f37ff1f060b1633df73d671a6b09bb2178
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7865
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add detection for mips cpu types by using prid.
Add cpuinfo command for inspecting more verbose info.
Add MIPS Architecture specs in openocd docs.
Change-Id: I28573b7c51783628db986bad0e226dcc399b4fa6
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7912
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Some devices with an internal multi-tap JTAG router require a vendor
specific bypass instruction to bypass the master TAP when addressing
slave taps internal to the same device. On these devices the standard
bypass instruction bypasses the whole device.
Change-Id: I4506f0e67c9e4dfe39b7fa18c63d67900313e594
Signed-off-by: Henrik Nordström <henrik.nordstrom@addiva.se>
Reviewed-on: https://review.openocd.org/c/openocd/+/8041
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
swd_connect_multidrop() sent DORMANT_TO_SWD and called
swd_multidrop_select_inner(). DORMANT_TO_SWD sequence ends
with a LINE_RESET sequence.
swd_multidrop_select_inner() sent LINE_RESET sequence again.
It was useless in this case.
swd_connect_multidrop() emited JTAG_TO_DORMANT and DORMANT_TO_SWD
sequences before connecting each DAP in SWD multidrop bus.
It is sufficient to emit JTAG_TO_DORMANT and DORMANT_TO_SWD
just once and emit the shorter LINE_RESET instead for subsequent DAPs.
Introduce a global variable swd_multidrop_in_swd_state
and use it to control what sequence is emitted.
In case of reconnect after an error, always use the full switch
JTAG_TO_DORMANT and DORMANT_TO_SWD.
Change-Id: Iba21620f6a9680793208bf398960ed0eb59df3b1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7218
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
SWD multidrop requires some initialization once before connecting
all daps. Provide an optional pre-connect dap operation.
Change-Id: I778215c512c56423a425dda80ab19a739f22f285
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7542
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The original code supported ADIv5 only, just one SELECT register
with some reserved bits - the pseudo value DP_SELECT_INVALID was
just fine to indicate the DP SELECT register is in an unknown state.
Added ADIv6 support required DP SELECT and SELECT1 registers
without reserved bits. Therefore DP_SELECT_INVALID value became
reachable as a (fortunately not really used) ADIv6 AP ADDR.
JTAG DPBANKSEL setting support introduced with ADIv6 does not
honor DP_SELECT_INVALID correctly: required select value
gets compared to DP_SELECT_INVALID value and the most common zero
bank does not trigger DP SELECT write.
DP banked registers need just to set DP SELECT. ADIv6 AP register
addressing scheme may use both DP SELECT and SELECT1. This further
complicates using a single invalid value.
Moreover the difference how the SWD line reset influences
DPBANKSEL field between ADIv5 and ADIv6 deserves better handling
than setting select cache to zero and then to DP_SELECT_INVALID
in a very specific code positions.
Introduce bool flags indicating the validity of each SELECT
register and one SWD specific for DPBANKSEL field.
Use the latter to prevent selecting DP BANK before taking
the connection out of reset by reading DPIDR.
Treat DP SELECT and SELECT1 individually in ADIv6 64-bit mode.
Update comments to reflect the difference between ADIv5 and ADIv6
in SWD line reset.
Change-Id: Ibbb0b06cb592be072571218b666566a13d8dff0e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7541
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
In loops that typically take longer time to complete, check if there is
a pending shutdown request. If so, terminate the loop.
This allows to respond to a signal requesting a shutdown during some
loops which do not return control to main OpenOCD loop.
Change-Id: Iace0b58eddde1237832d0f9333a7c7b930565674
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8032
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
While at it, fix some coding style issues.
Change-Id: I8196045f46ce043ed0d28cb95470132b3a7de1bb
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8039
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The field backup_working_area is always used as a boolean value.
Use bool type for backup_working_area.
Change-Id: I55c68d717dbbe9e5caf60fd1db368527c6d1b995
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8036
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
I don't think there are any real bugs here, but at least this gives us a
clean slate moving forward.
Change-Id: I29c6c398c28dfe580f9a2deb3bdbcfc491a2ceb6
Signed-off-by: Tim Newsome <tim@sifive.com>
These messages helps to clarify current status of examination process
Change-Id: I5d93903c4680deed2c1bf707d8f7ef0b48ffdc9a
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8013
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This functionality can be useful for;
1-ESP flashing code to load flasher stub on target and
write/read/erase flash.
2-ESP GCOV command uses some of these functions to run
onboard routines to dump coverage info.
This is high level api for the Espressif xtensa and riscv targets
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I5e618b960bb6566ee618d4ba261f51af97a7cb0e
Reviewed-on: https://review.openocd.org/c/openocd/+/7759
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
The goal of this commit is to provide more robust error handling in
`write_memory_progbuf()`. This is achieved by rewriting it in a fashion
similar to `read_memory_progbuf()`.
The motivation is: some instability in `load_image` was encountered. No
stable reproduction could be obtained, so the root cause was not
determined. Therefore, it was decided to clean-up the code, that may be
implicated in such failures.
Examples of unhanded errors in the code prior to this commit:
* Most of `dmi_write()` return values are discarded.
* If `dm_read()` on `abstractcs` failed (line 4546), `abstractauto` was
not cleared.
Furthermore, the structure of the code was quite complicated, which made
it hard to analyze and reason whether or not all possible failures are
handled properly.
Change-Id: I8a100b686e594855fbf34acf5ccf0e1550f18869
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
While at it, fix the 'wp' command documentation.
Change-Id: I70f3110e8ce286051f8f810260f1857b2285e634
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8022
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
By definition in `target/target.h`, `coreid` is not a unique identifier
of a target -- it can be the same for targets on different TAPs.
Change-Id: Ifce78da55fffe28dd8b6b06ecae7d8c4e305c0a2
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7997
Tested-by: jenkins
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
When user requested a change on cp0 status register,
it may contain changes on EXL/ERL bits, and changes on
these bits could lead to differnt behaviours on writing
to other cp0 registers.
Change-Id: Ic83039988c29c06ee134226b52de943c46d19da2
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7914
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
OpenOCD style guide(`doc/manual/style.txt`) prohibits use of VLA:
> - use malloc() to create dynamic arrays. Do @b not use @c alloca
> or variable length arrays on the stack. non-MMU hosts(uClinux) and
> pthreads require modest and predictable stack usage.
Change-Id: I12e4a5087fd056d69866137237af6deca27f5d33
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
`LOG_TARGET_DEBUG()` reports file, line and function name at the call
site. This information is not helpfull if it always points to the same
location inside `log_debug_reg()`.
Change-Id: Ib73be0344fb5c80c9ac8e5fdee1084d405522eb7
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
If we can't remove bp/wp, we will stuck in endless loop
Change-Id: I44c0a164db1d15c0a0637d33c75087a49cf5c0f4
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7940
Tested-by: jenkins
Reviewed-by: Anatoly P <kupokupokupopo@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
There was a big conflict with this one incoming change. This version of
the code passes all the tests (which don't test for the changed behavior
at all AFAIK), and at least passes errors back everywhere.
Conflicts:
src/target/breakpoints.c
Change-Id: I72f75a3e08deda7e624e8bb82e1a9ea07a7a9276
Instead of returning an 'error string', throw an error. This makes it
much easier to handle errors in Tcl scripts or in tools that use Tcl RPC.
Change-Id: I75c48750cfad7430fa5e6bc88fe04ebd59d34cea
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8006
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The mips opcode macro for the SRL opcode was using the wrong constant
value:
SRA -- Shift right arithmetic
Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0011
SRL -- Shift right logical
Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0010
This corrects the opcode constant for SRL and adds the SRA opcode for
completeness.
There is only one user of MIPS32_OP_SRL in src/flash/nor/cfi.c:
Since the mask constant (0x00000080 for the DQ7 mask) shifted in this
case would never have the sign bit set, it worked fine even though it
was accidentally using the SRA opcode instead of SRL.
Change-Id: I0a80746e2075c7df1ce35b9db00d9d0b997a3feb
Signed-off-by: Tobias Diedrich <ranma+openocd@tdiedrich.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/3613
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
We were previously inadvertently clearing the top 32 bits of SCTLR_EL1
during read_memory/write_memory as a result of using 32-bit operations
to access the register and because the fields used to temporarily
store the register were 32-bit. Fix it.
Change-Id: I657d7f949e1f7ab6bf90609e3f91cae09cade31a
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7939
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Associativity=0 means that only one CMO is needed for all ways.
It could also mean that the cache is 1-way, but this is less likely.
Currently Associativity=0 causes us to hang in the while loop in
decode_cache_reg. Fix it by skipping the loop in this case. We can let
way_shift be set to the arbitrary value of 0 because in the case where
Associativity=0 we only ever shift 0 by it before ORing it into the
CMO operand.
Change-Id: I7c1de68d33f6b3ed627cbb1e2401d43185e4c1e3
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch adds target logging to breakpoint
handling code. This makes it easier to
debug multicore/multithread systems.
Change-Id: I6bea8079a457070a8f63d0ce381a4ece6f5a190a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7922
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
If we can't remove bp/wp, we will stuck in endless loop
Change-Id: I44c0a164db1d15c0a0637d33c75087a49cf5c0f4
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7940
Tested-by: jenkins
Reviewed-by: Anatoly P <kupokupokupopo@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Break- and watchpoints are not removed when a target is destroyed
which introduces a memory leak.
Change-Id: I6143d48f7efd765b7752a12fdc337da3496d896f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7956
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
In the unusual (and even incorrect) case of running the command
target create ...
before defining an adapter and the associated transport, the
command causes a segmentation fault. E.g.:
openocd -c 'target create cpu cortex-m -endian little'
Check that get_current_transport() returns a valid pointer before
referencing it.
Change-Id: I9796a7e92196ef3df5c7152b27c34102045dc9e7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7962
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Now it returns `resource not available`
Change-Id: Ifbbd468bdf62023850690eb96fe8a16f4114e915
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
The existing code didn't seem to work right at all. I have spike
modifications that exercise these new cases. I'll merge those once this
has merged.
Change-Id: I89bd336f34f1b208a76f25b6b41fe3877800765b
Signed-off-by: Tim Newsome <tim@sifive.com>
Compilers are good at optimizing, and with functions it's abundantly
clear what all the types involved are. This change means we don't have
to be super careful about the type of values because of what the macro
might do to them that might cause overflow.
The only place where the return type matters is in printf-style
functions, and I made get_value32() for those cases where a change was
needed.
This should set the stage for simply copying the latest debug_defines.h
from the debug spec build again.
Change-Id: I5fb19d0cfc1e20137832a7b344b05db215ce00e1
Signed-off-by: Tim Newsome <tim@sifive.com>
The reasoning for the change:
* `__func__` is part of C99, `__PRETTY_FUNCTION__` is GNU extension.
* `__PRETTY_FUNCTION__` is defined to be the same as `__func__` for C
sources by GCC documentation but differ for C++ sources (full
signature instead of just a name).
* Currently Clang does support `__PRETTY_FUNCTION__`, though it uses
GCC's C++ variant across C and C++.
Therefore using `__PRETTY_FUNCTION__` creates confusion and does not
provide any valueble information in the logs.
Change-Id: Ie0db6d73f602784b6752a30911dcef3dd7ee4594
Sometimes, the value from of some DMI scans has no meaning (e.g. when
`op` is read). Such values should not be decoded. To make the dumps more
consistent, `<no decoding available>` is printed when there is no
decoding for a register.
Change-Id: I415f06a5a80f2fc8fb8ab3f79132bdf0602c8ad6
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This allows programmatically determining the debug reason.
Change-Id: I0c3e85cebb6dc28fc0fc212beca84a484ac654a5
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7952
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Fixes below Sparse tool warning.
warning: symbol 'breakpoint_watchpoint_remove_all' was not declared.
Should it be static?
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4af1d5aa54abcb45f746b877513ba0b5fccbeb47
Reviewed-on: https://review.openocd.org/c/openocd/+/7955
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Enhance `mips32_read_config_regs` to better detect MIPS32 ISA,
DSP, and FPU features, allowing user to get more detailed
target information.
Most of these information will be used in MIPS m/iAptiv support.
Change-Id: I23571a626ec64fa019acac91bdbfcb434373bfc1
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7911
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This patch forces a read of register from the target
in the get_reg command in case the register cache
does not hold a valid value at that moment.
Note that the command "reg" already handles it
correctly, no fix is needed there.
Change-Id: I75fad25188e94ee4e06162ab6d600ea24dbf590a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7958
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
By definition in `target/target.h`, `coreid` is not a unique identifier
of a target -- it can be the same for targets on different TAPs.
Change-Id: Ifce78da55fffe28dd8b6b06ecae7d8c4e305c0a2
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This patch replaces ~(typeof(watchpoint->mask))0 with
WATCHPOINT_IGNORE_DATA_VALUE_MASK. This improves
readability and moves the RISCV target in line with
other targets.
Change-Id: I15ac4d4ee76098b304d9b22f720911ba4329c190
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Depending on configuration, the existing implementation of watchpoints is
rather inefficient for certain scenarios. Consider HW that:
1. triggers 0-3 can be used as instruction breakpoints
2. triggers 4-7 can be used as data breakpoints (watchpoints)
3. NAPOT triggers are not supported.
Now, consider that we have a pending watchpoint. And we perform a "step"
operation. According to the current implementation:
* OpenOCD will disable watchpoints
* Perform a single-step
* Will try to restore the original watchpoints. It will need 12 attempts
to find a suitable trigger: (8 attempts to try NAPOT, and another 4 to try
GE+LE).
This patch introduces a dedicated cache for requests to triggers. It
significantly speeds things up, since we cache failed attempts and no
additional interactions with HW is necessary.
Change-Id: Ic272895eaa763a7ae84d14f7633790afd015ca9d
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
Otherwise it won't compile for me. Not sure why that doesn't affect the
automated builds.
Change-Id: Ic66c743e1698c4c0772e5601723cb5c711b4fa5c
Signed-off-by: Tim Newsome <tim@sifive.com>
Since DPC is WARL (same rules as MEPC according to
the specification), it is possible that
writes to it won't result in the exact value present.
Therefore, writes to it shouldn't be cached, same as
with other WARL registers.
Change-Id: I818c0cef9727b999b7d84b19f9f42cd706c99d69
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Added the ability to enter dimensionless registers
Change-Id: I1b781959ce4690ec65304142bd9a7c6f540b3e86
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
Now:
1) If mmu is disabled, virt2phys succeeded and returns physical address
2) If mmu is enbaled, but translation fails, read/write_memory fails
Change-Id: I312309c660239014b3278cb77cadc5618de8e4de
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Add result check for mips32_pracc_read_regs in mips32_save_context.
Change-Id: Ie796d2b05a9feb11e246c2d0771b52cad4fb70db
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7932
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Previously, when listing the watchpoints, OpenOCD printed
numbers 0, 1 and 2 representing READ, WRITE and ACCESS type
watchpoints.
This patch changes it to 'r', 'w' and 'a'. This increases the
clarity as what type the watchpoint actually is.
Change-Id: I9eac72dfd0bb2a9596a5b0c080a3f584556ed599
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7909
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch adds the "all" option to the rwp command.
It removes all watchpoints, much like rbp all removes
all breakpoints.
Change-Id: Id58dd103085e558f17afa4a287888cf085566ca9
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7907
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
If wp/bp is missing at address rwp/rbp won't return zero code (on smp).
Now it fixed.
Fixes: 022e438292 ("target: Change policy of removing watchpoints/breakpoints.")
Change-Id: I3a3c245f7088fc23227b286d2191fc7f3edba702
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7910
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add support for the ARM MCRR/MRRC instructions which require the use of
two registers to transfer a 64-bit co-processor registers. We are going
to use this in a subsequent patch in order to properly dump 64-bit page
table descriptors that exist on ARMv7A with VMSA extensions.
We make use of r0 and r1 to transfer 64-bit quantities to/from DCC.
Change-Id: Ic4975026c1ae4f2853795575ac7701d541248736
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Michael Chalfant <michael.chalfant@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Currently, instruction cache is being invalidated in
arc_{un,}set_breakpoint() regardless of whether the breakpoint's type is
HW or SW. For SW breakpoints, this has no net effect as the caches are
flushed as a by-product of overwriting instructions in main memory and
is thus merely unnecessary; but for HW breakpoints this invalidation is
not preceded by a flush and might lead to loss of data. This patch
removes the invalidate() call altogether to correct this undesired
behavior for HW breakpoints.
With this patch applied, all supported HW breakpoint tests from the gdb
testsuite are now passing with the arc-openocd backend.
Change-Id: I3d252b97f01f1a1e2bf0eb8fb257bdab0c544bc2
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7767
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The comment above armv8_dpm_read_current_registers() doesn't match
the implementation, as the function reads all the registers from
ARMV8_PC and above.
The registers currently read are not relevant to answer to the
usual GDB initial request through the 'g' packet. Plus the lack of
differentiation per core state (AArch32 vs AArch64) causes the
read of not existing registers in AArch32 triggering errors, as
tentatively fixed by https://review.openocd.org/5517/
Fix the code to read the registers initially required by GDB.
Modify the comment to report the register list in AArch32 and in
AArch64.
Keep the extra checks inside the read loop, even if they are
mostly irrelevant; this could prevent errors if someone needs to
extend the number of registers to read.
The current implementation of the register's description in
OpenOCD does not allow to discriminate among AArch32 and AArch64
registers. Add a TODO comment to highlight it.
Change-Id: Icd47d93c19a9e1694a7b51bbc5ca7e21a578df41
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7887
Tested-by: jenkins
Move `examine_attempted` flag to target struct to make it target specific.
`Info` messages for retry and `Error` messages for failure added.
Change-Id: Id2fbe7dc68d746c936c8412289d0d149fbd80d71
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
The secure microcontroller Infineon SLx2 uses a custom Cortex-M33.
The register CPUID reports value 0x490FDB00.
Reference link to the product:
Link: https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html
Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5
Signed-off-by: Ahmed Boughanmi <boughanmi.external@infineon.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7879
Reviewed-by: Karl Palsson <karlp@tweak.au>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This patch adds error reporting when unknown image type is specified.
Previously, OpenOCD replied with an empty string.
Change-Id: I16220b1f5deb3b966a21731f0adf7911a78e8959
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7883
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add a new riscv specific commands to disable triggers
Change-Id: Ic1842085aa66851c740e0abcbfbe0adbe930920e
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Extend riscv set_ebreak* commands.
Now it can be called without args to print current value.
riscv_ebreak* flags are moved to riscv_info struct.
Change-Id: Ib46e6b6dfc0117599c7f6715c7aaf113e63bd7dc
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
and DP_SELECT_DPBANK.
Use the defined symbols instead of magic numbers.
Change-Id: I19c86b183e57e42b96f76eed180c0492cd67bee1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7539
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
DP_SELECT_APSEL and DP_SELECT_APBANK is no more used in ADIv6.
Change-Id: I4176574d46c6dc8eb3fe3aef6daab6e33492c050
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7538
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
`riscv_debug_reg_to_s()` can be used to decode register value. If the
pointer to buffer is `NULL` it does not print anything, just returns the
length of the string.
The format is:
`<register_value> { <field_name>=<field_value_name or field_value>, ..., }`
e.g:
`0x400382 { version=2, ... ndmresetpending=false, }`
`0x321009 { regno=0x1009, ... cmdtype=0, }`
Change-Id: I63733d8d36385d89ca15de1a43139134bc488c4f
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
For ARMv8, add AArch64 mdd and mwd support. AArch32 not supported.
Change-Id: I25490471e16943e5a67d7649595d77643aa9a095
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7192
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
When the target isn't halted, simply return an error. This used to be
purely internal code so an assert was appropriate. Now after some
refactoring and with unavailable harts you could get here when the hart
is unavailable. In that case the right thing is simply to return an
error message.
Change-Id: I49d26a11fe7565c645fd2480e89a2c35ea9b1688
Signed-off-by: Tim Newsome <tim@sifive.com>
Previously, if the image file was less than 9 bytes long,
it was assumed to be an error when it could be a binary
image file. This patch makes OpenOCD detect these cases
as binary files.
Change-Id: I5b4dad2b547786246887812ac75907378fe58671
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7880
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch unifies the lines printed by the "bp" command
so that different types of breakpoints are printed in
the same format.
Change-Id: Ic1335eda1c58072a334aed9cf0011431c8ec86a4
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7861
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Now internal watch/breakpoint will not be removed in case
of error during removing triggers from hardware.
Also change signature of some functions (for deletion
bp/wp) to print message in case of some error.
Change-Id: I71cd1f556a33975005d0ee372fc384fddfddc3bf
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7738
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Previously, an unknown semihosting operation number
was logged as debug. This patch changes it and few
other places to be logged as error instead.
Change-Id: I83cae5ca1e3daed440f92b08bd372bfffbbad63c
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
This patch disables software breakpoints of size 2 for targets
which don't support compressed instructions.
Change-Id: I8200b22a51c97ba2aa89e6328beadde8dd35cdd5
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Introduce the ability to detect CPUs based on CP0 PRId register and
apply cpu specific quirks, which alter the default ejtag behavior.
First of those is EJTAG_QUIRK_PAD_DRET, which makes sure extra NOPs are
placed after the DRET instruction on exit from debug mode. This fixes
resume behavior on Ingenic JZ4780 SoC.
The proper detection of some (currently unsupported) CPUs becomes quite
complicated, so please consult the following Linux kernel code when
adding new CPUs:
* arch/mips/include/asm/cpu.h
* arch/mips/kernel/cpu-probe.c
Change-Id: I0f413d5096cd43ef346b02cea85024985b7face6
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7859
Tested-by: jenkins
These cores are advertised as M23 and M33 compatible, but are identified
by the Realtek implementor id. These cores are found on the RTL872xD
family, at least.
Raw CPUIDs:
Real-M200 (KM0): 721cd200
Real-M300 (KM4): 721fd220
Change-Id: I4106ccb7e8c562f98072a71e9e818f57999d664e
Signed-off-by: Karl Palsson <karlp@tweak.au>
Reviewed-on: https://review.openocd.org/c/openocd/+/7846
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Presently, we only look at the Part Number field of the CPUID, and
completely ignore the Implmentor field, simply assuming it to be ARM.
Parts have since been found, with different implementors, that use
overlapping part numbers, causing detection to fail.
Expand the "part number" field to be a full implementor+part number,
excluding the revision/patch fields, to make checking more reliable.
Change-Id: Id81774f829104f57a0c105320d0d2e479fa01522
Signed-off-by: Karl Palsson <karlp@tweak.au>
Reviewed-on: https://review.openocd.org/c/openocd/+/7845
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
During a previous patch, the ignoring of writes to register zero
was deleted. This patch restores it to the original.
Change-Id: Ieb028a5b2e3f691e4847713c7bc809e10726e18c
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
This also fixes a bug when, after `examine` completion, the target still
has `unknown` status. To reproduce this one spike, it is enough to do
the following:
---
// make sure spike harts are halted
openocd ... -c init -c 'echo "[targets]"'
---
this behavior is quite dangerous and leads to segfaults in some cases
Change-Id: I13915f7038ad6d0251d56d2d519fbad9a2f13c18
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
This patch improves the following issues:
1. Makes it compatible with targets with progbufsize == 1.
2. Although exceptions don’t update any registers, but do end execution
of the progbuf. This will make fence rw, rw impossible to execute.
Change-Id: I2208fd31ec6a7dae6e61c5952f90901568caada6
Signed-off-by: Xiang W <wxjstz@126.com>
The motivation for this refactor is to fixup error handling for some
corner cases. These functions attempt to cache S0 register and only then
perform a bunch of extra checks to figure out if the requested register
is valid one in this context. The problem is that there are few corner
cases when _*progbuf functions could receive a GPR as an input. For
example, an abstract read could fail (for whatever reason) leading to
infinite recursion:
````
save S0 -> read S0 -> save S0 -> read S0 -> ...
```
The case described above could be fixed by adding extra sanitity checks,
however I decided to make these functions more modular since I find
self-contained functions easier to read.
Change-Id: I01f57bf474ca45ebb67a30cd4d8fdef21f307c7d
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Add missing aarch64_poll() calls to ensure the event
TARGET_EVENT_HALTED is called when necessary.
This is needed with the poller update introduced in commit
95603fae18 ("openocd: revert workarounds for 'expr' syntax change")
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: I6e91f1b6bc1f0d16e6f0eb76fc67d20111e3afd2
Reviewed-on: https://review.openocd.org/c/openocd/+/7737
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch changes data types of watchpoint value and mask to allow for
64-bit values match that some architectures (like RISCV) allow.
In addition this patch fixes the behavior of watchpoint command to
zero-out mask if only data value is provided.
Change-Id: I3c7ec1630f03ea9534ec34c0ebe99e08ea56e7f0
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7840
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
register_cache_invalidate() is written a way which uses
pointer arithmetic, which makes it harder to read. This patch
replaces it with more readable way to iterate over array of
structs.
Change-Id: Ia420f70a3bb6998c690c8c600c71301dca9f9dbf
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7735
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
OpenOCD fails in the presence of inactive/unresponsive cores
I faced with case when inactive core returns 0 while reading dtmcontrol.
This leads to failure on assert: "addrbits != 0" in "dbus_scan".
Also change "read_bits","poll_target" funcs to avoid a lot lines in logs
Change-Id: If852126755317789602b7372c5c5732183fff6c5
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Lot of messages was logged as LOG_WARNING, but the operation failed
immediately. Sometimes no error message was logged at all.
Add missing messages, change warnings to errors.
Sometimes ERROR_TARGET_INVALID was returned. Some command handlers
returned ERROR_OK! Always return ERROR_TARGET_NOT_HALTED.
While on it use LOG_TARGET_ERROR() whenever possible.
Prefix command_print() message with 'Error:' to get closer
to LOG_TARGET_ERROR() variant.
Error message was not added to get() and set() methods of
struct xxx_reg_type - the return value is properly checked and a message
is logged by the caller in case of ERROR_TARGET_NOT_HALTED.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I2fe4187c6025f0038956ab387edbf3f461c69398
Reviewed-on: https://review.openocd.org/c/openocd/+/7819
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Support assign DMI address of the debug module by pass
-dbgbase to the target create command
Change-Id: I774c3746567f6e6d77c43a62dea5e9e67bb25770
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
This patch adds target logging to logging instances where it makes sense.
This is especially useful when debugging multiple targets at once,
such as multicore systems.
Change-Id: Ia9861f3fa0e6e5908b683c2a8280659c3c264395
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
While not affecting the function's main purpose, an error has
crept into arc_save_context() that results in logging wrong register
values when the debug level is 3 or more. For instance, when debugging a
trivial program and halting at entry to main, the following values are
printed to the log:
Debug: 2915 2020 arc.c:894 arc_save_context(): Get core register regnum=0,
name=r0, value=0x0000000
...
Debug: 2947 2020 arc.c:894 arc_save_context(): Get core register regnum=60,
name=lp_count, value=0x900002d8
Debug: 2948 2020 arc.c:894 arc_save_context(): Get core register regnum=63,
name=pcl, value=0xffffffff
Debug: 2949 2020 arc.c:909 arc_save_context(): Get aux register regnum=64,
name=pc, value=0x900000b4
Debug: 2950 2020 arc.c:909 arc_save_context(): Get aux register regnum=65,
name=lp_start, value=0x900000bc
Debug: 2951 2020 arc.c:909 arc_save_context(): Get aux register regnum=66,
name=lp_end, value=0x00080801
Debug: 2952 2020 arc.c:909 arc_save_context(): Get aux register regnum=67,
name=status32, value=0xffffffff
After the change, the register contents make much more sense:
Debug: 2923 3934 arc.c:889 arc_save_context(): Get core register regnum=0,
name=r0, value=0x00000000
...
Debug: 2955 3934 arc.c:889 arc_save_context(): Get core register regnum=60,
name=lp_count, value=0x00000000
Debug: 2956 3934 arc.c:889 arc_save_context(): Get core register regnum=63,
name=pcl, value=0x900002d8
Debug: 2957 3934 arc.c:903 arc_save_context(): Get aux register regnum=64,
name=pc, value=0x900002da
Debug: 2958 3934 arc.c:903 arc_save_context(): Get aux register regnum=65,
name=lp_start, value=0x900000b4
Debug: 2959 3934 arc.c:903 arc_save_context(): Get aux register regnum=66,
name=lp_end, value=0x900000bc
Debug: 2960 3934 arc.c:903 arc_save_context(): Get aux register regnum=67,
name=status32, value=0x00080801
While at it, simplify a couple of expressions.
Change-Id: I8f2d79404707fbac4503af45b393ea73f91e6beb
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7765
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Besides checkpatch, now upstream codes are scanning with
Sparse semantic checker tool.
This commit addresses some Sparse and checkpatch warnings.
Change-Id: I0e3e9f15220d8829c5708897af27aa86a8f90c07
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Below warnings are fixed.
1- A function declaration without a prototype is deprecated in all
versions of C [-Werror,-Wstrict-prototypes]
2- error: variable set but not used [-Werror,-Wunused-but-set-variable]
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I1cf14b8e5e3e732ebc9cacc4b1cb9009276a8ea9
Reviewed-on: https://review.openocd.org/c/openocd/+/7569
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
* Add a warning when eq trigger is setup and it's behavior is different
from other triggers.
* Make eq trigger's behavior consistent with other triggers in case of
length == 1.
* Fix a bug in setting chained triggers (LT, GT case).
* Improve logging.
Change-Id: Id1ed0d11971b8ed875afbb979e6c8a8b51dd3818
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
There were a couple of problems with previous implementation:
* Misalligned read would return ERROR_OK and print all zeroes.
* CMDERR_BUSY for abstract access was improperly handled:
According to the spec, no assumptions can be made about DM_DATA*
contents in such a case, but these were considered valid values from
memory.
* A fallback to one element read was implemented when DMI_STATUS_BUSY
occurred during batch reads, even though this can be accounted for.
Change-Id: I09174c61c951b2bb97a529b7f0aa5afaa995179b
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Memory region addresses are not in use for now.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I9a2189e956ae59b56245ec914ab16719df857b2d
Reviewed-on: https://review.openocd.org/c/openocd/+/7762
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Right after target halt, some activities needs to be done
such as printing exception reason, disable wdts and reading
debug stubs information.
Missing activities will be submitted in the next patches.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I27aad5614d903f4bd7c8d6dba6bfb0bdb93ed8dc
Reviewed-on: https://review.openocd.org/c/openocd/+/7757
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
1. update RISCV_MAX_HARTS to 2^20 according to SPEC
2. remove RISCV_MAX_REGISTERS, it's not used anywhere anymore
3. add parentheses
Change-Id: Iadf0fa1ba3bbe5b9420b8430883e140db87f4f9e
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
If a target where a software breakpoint was set is not currently
available, but there are other targets in the same SMP group that are
available, then we can use those to remove the software breakpoint.
Change-Id: I9faa427c7b3aee31504e6e6599539e6f29b58d8f
Signed-off-by: Tim Newsome <tim@sifive.com>
According to section 5.6 in the RISC-V debug specification, the previous
way to set triggers was incorrect, as was discussed as part of
https://github.com/riscv/riscv-openocd/issues/870. This commit fixes the
sequence to be in line with the specification as well as adds some comments
to clarify for any future reader as to what is actually done.
Change-Id: Iffc5cc0f866a466a7aaa72a4c53ee95c9080ac9d
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior
Change-Id: I469453d95e7c1640a91bc60d80c854404e508535
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
This patch fixes the handling of errno by setting the sys_errn
only if error has actually occurred during the semihosting call.
It also fixes few issues where error was not set in the first place.
Change-Id: I2fbe562f3ec5e6220b800de04cd33aa1f409c7a0
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch introduces function semihosting_opcode_to_str() which
converts semihosting opcodes to strings. This function is then
used in debug messages to improve log analysis and troubleshooting.
Change-Id: Iffea49dae13d6a626ae0db40d379cba3c9ea5bd3
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7726
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
With this change, failures to resume a hart due to it not being halted
are more explicitly logged or reported as an error.
Change-Id: Ia55d8df85a908363d0f2140637ce1e47c1ab6251
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This involves halting the target, which might have unintended side
effects, but when the debugger is connected software breakpoints must
trap to the debugger. Anything else is a terrible user experience.
Change-Id: I1f7bb610eeeb054cc3042dc6bcfc16589ce12a31
Signed-off-by: Tim Newsome <tim@sifive.com>
Intended as a place where we can interact with the target without too
much concern about preserving state and doing exactly the right thing
while poll() is going on.
Change-Id: Ic9bd441caae85901a131fd45e742599803df89b5
Signed-off-by: Tim Newsome <tim@sifive.com>
Specifically, call into the RISC-V version when target becomes halted,
running, or unavailable.
I'll be using unavailable shortly.
Change-Id: I9ffffdccbf22e053fe6390d656b362bf9ab9559a
Signed-off-by: Tim Newsome <tim@sifive.com>
Will be used later when we want to do a quick halt/resume.
Change-Id: Ib80166234c4c277b7d9ce26b7566ac0f93017e64
Signed-off-by: Tim Newsome <tim@sifive.com>
* Only set ebreak bits that might be supported based on misa.
* Don't write dcsr if its value wouldn't change.
Change-Id: I7087af0b0df0fbdbf994373b5c887b9b389df872
Signed-off-by: Tim Newsome <tim@sifive.com>
Make it callable earlier, handle `supported` being NULL, and make enum
names more clear.
Change-Id: If4d286b54ccfc01eb5de5a57eb18f748c920e979
Signed-off-by: Tim Newsome <tim@sifive.com>
The riscv013_on_halt function was being called but its implementation was
empty, providing no additional functionality. Removed the function declaration,
calls to it, and its implementation since it is not required.
Change-Id: I425ea890deadeec945f0a47af247f3f99172e801
Signed-off-by: Tim Newsome <tim@sifive.com>
When halted we don't need to read all 3 instructions before deciding the
sequence doesn't match.
Change-Id: I9f8345960ce27e859265af901a368166a70b9fde
Signed-off-by: Tim Newsome <tim@sifive.com>
On Windows, isatty() can return any non-zero value if it's an interactive
device. Which diverges from the ARM semihosting specification. This patch
introduces a fix to make the SYS_ISTTY operation conform to spec.
Change-Id: I9bc4f3cb82370812825d52419851910b3e3f35cc
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7725
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Added debug prints to show what is the target debug reason. Also added
debug print for Ctrl-C response. This is useful for troubleshooting and
log analysis.
Change-Id: I055936257d989efe7255656198a8d73a367fcd15
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7720
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
These functions used to exist but don't anymore. (Pointed out in #863)
Change-Id: Iac6b5edd320bdff7628a788861e332f956dcd93d
Signed-off-by: Tim Newsome <tim@sifive.com>
Previously, progbuf execution did not flush or invalidate the register cache which could lead to incorrect behavior. This patch fixes it as well as refactors few sore points in the code related to it.
Change-Id: I353b931ca70a1828d4a9cc512aead00441730875
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Otherwise we may end up modifying DCSR of a different hart than
intended.
Change-Id: I39bde21a1444623ed150f2b3d504b9318b9d6191
Signed-off-by: Tim Newsome <tim@sifive.com>
Clang reports that 3rd function call argument is an uninitialized value
file esp32_apptrace.c line:1270
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I73e254d4eb0c6b3152229717d8827d334784ab92
Reviewed-on: https://review.openocd.org/c/openocd/+/7719
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Value in the 'dscsr' variable is garbage until the DAP queue is run.
Postpone evaluation of the 'secure_state' variable. Reading the
core registers in between will execute the DAP queue.
Change-Id: I44959e882dbafb1b9779e813c3d13f3b3dbcd47f
Signed-off-by: Bohdan Tymkiv <bohdan200@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7693
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The registers pauth_dmask and pauth_cmask are not accessible in
AARCH32 mode. Tagging them as 'hidden' is not enough and triggers
error:
Failed to read pauth_dmask register
while halting the core.
Tag the pauth registers as not existing, unless required by user.
Note: for non existing registers there should be no need to
allocate their register cache. Let's keep this for a further
improvement.
Change-Id: Iaa0d006a3d8ee611ee93333ed49a8615a6c94276
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: d0436b0cda ("armv8: Add support of pointer authentication")
Reviewed-on: https://review.openocd.org/c/openocd/+/7712
Tested-by: jenkins
Reviewed-by: Koudai Iwahori <koudai@google.com>
Register access on running target should fail if mstatus needs to be
modified.
Change-Id: Iec8e8d514ef2f5ca42606a5534cce55aaaa99180
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
- Manual integration of File-IO support from xt0.2 release
- Verified with applications linked using gdbio LSP
- No new clang static analysis warnings
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: Iedc5f885b2548097ef4f11ae1a675b5944f5fdf0
Reviewed-on: https://review.openocd.org/c/openocd/+/7550
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The function is used for commands:
- jtag tapisenabled
- jtag tapenable
- jtag tapdisable
While there, add the missing .help and .usage fields and fix the
incorrect check in jtag_tap_enable() and jtag_tap_disable().
Change-Id: I0e1c9f0b8d9fbad19d09610a97498bec8003c27e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7554
Tested-by: jenkins
While there:
- fix memory leak in case of error on values tap->chip,
tap->tapname, tap->expected_ids;
- check for out of memory error;
- fix minor coding style issue;
- add the missing .usage field;
- remove functions not in use anymore.
Change-Id: I1c8c3ffeb324e9eacb919c7e0d94fd72122c9a81
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7431
Tested-by: jenkins
Change the prototype of functions:
- target_run_algorithm()
- target_wait_algorithm()
- target_wait_state()
- struct target_type::run_algorithm()
- struct target_type::wait_algorithm()
to use unsigned int for timeout_ms instead of int.
Change accordingly the variables passed as parameter.
Change-Id: I0b8d6e691bb3c749eeb2911dc5a86c38cc0cb65d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7562
Tested-by: jenkins
While there, add the missing .usage field and remove the now
unused function jim_target_tap_disabled().
Change-Id: I79afcc5097643fc264354c6c3957786a55f40498
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7561
Tested-by: jenkins
The function esp32_cmd_apptrace_generic() is not used outside the
file.
Declare it as static.
Detected through 'sparse' tool.
Change-Id: I08c6b92fb01594320bc3ae6b16067ac4eb51ca12
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7676
Tested-by: jenkins
Jan Matyas
Evgeniy Naydanov
Antonio Borneo
ianst
Evgeniy Didin
Tarek BOCHKATI
Tomas Vanek
Walter Ji
Marc Schink
Henrik Nordström
Peter Collingbourne
Tim Newsome
Parshintsev Anatoly
Karl Palsson
Kirill Radkin
Erhan Kurubas
Tobias Diedrich
Marek Vrbka
Anastasiya Chernikova
Florian Fainelli
Artemiy Volkov
liangzhen
Ahmed Boughanmi
Fedi Bouzazi
Daniel Goehring
Artur Rojek
Xiang W
Mark Zhuang
eolson
Bohdan Tymkiv