Merge pull request #854 from en-sc/en-sc/fix-regacc-running
target/riscv: fix register access on running target
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commit
5a9654d272
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@ -1090,13 +1090,8 @@ static int prep_for_register_access(struct target *target,
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LOG_TARGET_DEBUG(target, "Preparing mstatus to access %s",
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gdb_regno_name(regno));
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/* FIXME: On a running target, there is no way to make sure mstatus won't
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* change between reading and writing it, so
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* if target->state != TARGET_HALTED an error should be returned here.
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* However, this would not allow access to FPU registers on the running
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* target.
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* See https://github.com/riscv/riscv-openocd/pull/842#discussion_r1178500114
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*/
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assert(target->state == TARGET_HALTED &&
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"The target must be halted to modify and then restore mstatus");
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if (riscv_get_register(target, orig_mstatus, GDB_REGNO_MSTATUS) != ERROR_OK)
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return ERROR_FAIL;
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@ -1487,6 +1482,9 @@ static int register_write_direct(struct target *target, enum gdb_regno number,
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LOG_TARGET_DEBUG(target, "Writing 0x%" PRIx64 " to %s", value,
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gdb_regno_name(number));
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if (target->state != TARGET_HALTED)
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return register_write_abstract(target, number, value);
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riscv_reg_t mstatus;
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if (prep_for_register_access(target, &mstatus, number) != ERROR_OK)
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return ERROR_FAIL;
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@ -1512,6 +1510,9 @@ static int register_read_direct(struct target *target, riscv_reg_t *value,
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{
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LOG_TARGET_DEBUG(target, "Reading %s", gdb_regno_name(number));
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if (target->state != TARGET_HALTED)
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return register_read_abstract(target, value, number);
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riscv_reg_t mstatus;
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if (prep_for_register_access(target, &mstatus, number) != ERROR_OK)
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