Eddie Hung
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eb597431f0
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Do not run xilinx_dsp_cascadeAB for now
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2019-09-20 12:18:37 -07:00 |
Eddie Hung
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0bca366bcd
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WIP for xiinx_dsp_cascadeAB
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2019-09-20 12:07:14 -07:00 |
Eddie Hung
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b0ad2592be
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Run until convergence
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2019-09-20 12:04:16 -07:00 |
Eddie Hung
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1b892ca1be
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Cleanup ice40_dsp.pmg
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2019-09-20 12:03:45 -07:00 |
Eddie Hung
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d88903e610
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Cleanup xilinx_dsp
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2019-09-20 12:03:25 -07:00 |
Eddie Hung
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1809f463fb
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More exceptions
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2019-09-20 12:03:10 -07:00 |
Eddie Hung
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70c5444b25
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Update doc
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2019-09-20 10:07:54 -07:00 |
Eddie Hung
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ed187ef1cf
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Add a xilinx_dsp_cascade matcher for PCIN -> PCOUT
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2019-09-20 10:00:09 -07:00 |
Eddie Hung
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1844498c5f
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Add an overload for port/param with default value
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2019-09-20 09:59:42 -07:00 |
Eddie Hung
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a0d3ecf8c6
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Small cleanup
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2019-09-20 08:41:28 -07:00 |
Eddie Hung
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8cfcaf108e
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Disable support for SB_MAC16 reset since it is async
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2019-09-19 22:48:57 -07:00 |
Eddie Hung
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a59f80834f
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SB_MAC16 ffCD to not pack same as ffO
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2019-09-19 22:39:47 -07:00 |
Eddie Hung
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1b88211ec6
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Clarify
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2019-09-19 21:58:34 -07:00 |
Eddie Hung
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34f9a8ceb2
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Update doc for ice40_dsp
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2019-09-19 21:57:11 -07:00 |
Eddie Hung
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8a94ce7aa5
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Add an index
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2019-09-19 20:04:44 -07:00 |
Eddie Hung
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c83a667555
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Fix width of D
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2019-09-19 18:08:46 -07:00 |
Eddie Hung
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a8bc460805
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Use ID() macro
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2019-09-19 16:13:22 -07:00 |
Eddie Hung
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b88f0f6450
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Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dsp
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2019-09-19 15:47:41 -07:00 |
Eddie Hung
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37b0fc17e3
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Re-enable sign extension for C input
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2019-09-19 15:40:17 -07:00 |
Eddie Hung
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64a72ed51e
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Do not perform width-checks for DSP48E1 which is much more complicated
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2019-09-19 14:50:11 -07:00 |
Eddie Hung
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517ca49963
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Remove TODO as check should not be necessary
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2019-09-19 14:49:47 -07:00 |
Eddie Hung
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307b2dc8e5
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Revert index to select
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2019-09-19 14:46:53 -07:00 |
Eddie Hung
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ea5e5a212e
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Cleanup xilinx_dsp too
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2019-09-19 14:34:06 -07:00 |
Eddie Hung
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1a0f7ed09c
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Refactor ce{mux,pol} -> hold{mux,pol}
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2019-09-19 14:27:25 -07:00 |
Eddie Hung
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429c9852ce
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Add HOLD/RST support for SB_MAC16
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2019-09-19 14:02:55 -07:00 |
Eddie Hung
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2766465a2b
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Add support for SB_MAC16 CD and H registers
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2019-09-19 12:14:33 -07:00 |
Eddie Hung
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c8310a6e76
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Refactor ice40_dsp.pmg
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2019-09-19 12:00:48 -07:00 |
Clifford Wolf
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b76fac3ac3
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Add techmap_autopurge attribute, fixes #1381
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-19 20:00:52 +02:00 |
Eddie Hung
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29d446d758
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Cleanup
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2019-09-19 10:39:00 -07:00 |
Marcin Kościelnicki
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c9f9518de4
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Added extractinv pass
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2019-09-19 04:02:48 +02:00 |
Eddie Hung
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70c607d7dd
|
Document (* gentb_skip *) attr for test_autotb
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2019-09-18 12:41:35 -07:00 |
Eddie Hung
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f7dbfef792
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Merge remote-tracking branch 'origin/master' into xc7dsp
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2019-09-18 12:40:21 -07:00 |
Eddie Hung
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b66c99ece0
|
Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext
peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells
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2019-09-18 12:40:08 -07:00 |
Eddie Hung
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44bf4ac35c
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Add doc on pattern detector for overflow
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2019-09-18 12:35:24 -07:00 |
Eddie Hung
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fd3b033903
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Merge remote-tracking branch 'origin/master' into xc7dsp
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2019-09-18 12:23:22 -07:00 |
Eddie Hung
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347cbf59bd
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Check overflow condition is power of 2 without using int32
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2019-09-18 12:16:03 -07:00 |
Eddie Hung
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1f18736d20
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Add support for overflow using pattern detector
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2019-09-18 09:39:59 -07:00 |
Eddie Hung
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0932e23dff
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Separate dffrstmux from dffcemux, fix typos
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2019-09-18 09:34:42 -07:00 |
Eddie Hung
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2b93b8fc74
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Merge pull request #1374 from YosysHQ/eddie/fix1371
Fix two non-deterministic behaviours that cause divergence between compilers
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2019-09-15 13:56:07 -07:00 |
Eddie Hung
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14d72c39c3
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Revert "Make one check $shift(x)? only; change testcase to be 8b"
This reverts commit e2c2d784c8 .
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2019-09-13 16:33:18 -07:00 |
Eddie Hung
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9a73adde50
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Explicitly order function arguments
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2019-09-13 16:18:05 -07:00 |
Eddie Hung
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95e80809a5
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Revert "SigSet<Cell*> to use stable compare class"
This reverts commit 4ea34aaacd .
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2019-09-13 09:49:15 -07:00 |
Clifford Wolf
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a67d63714b
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Fix handling of z_digit "?" and fix optimization of cmp with "z"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-13 13:39:39 +02:00 |
Eddie Hung
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3a39073302
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Set more ports explicitly
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2019-09-12 17:10:43 -07:00 |
Eddie Hung
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a1123b095c
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Merge remote-tracking branch 'origin/master' into xc7dsp
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2019-09-12 12:11:11 -07:00 |
Eddie Hung
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4ea34aaacd
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SigSet<Cell*> to use stable compare class
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2019-09-12 11:45:02 -07:00 |
David Shah
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6044fff074
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Merge pull request #1370 from YosysHQ/dave/equiv_opt_multiclock
Add equiv_opt -multiclock
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2019-09-12 12:26:28 +01:00 |
Eddie Hung
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f3081c20e7
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Add support for A1 and B1 registers
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2019-09-11 17:16:46 -07:00 |
Eddie Hung
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4369fc17d0
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Raise a RuntimeError instead of AssertionError
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2019-09-11 17:06:37 -07:00 |
Eddie Hung
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6fa6bf483c
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Rename {A,B} -> {A2,B2}
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2019-09-11 16:21:24 -07:00 |