Eddie Hung
8374eb1cb4
Remove unnecessary undriven_bits.insert
2019-06-12 15:55:02 -07:00
Eddie Hung
fb2758aade
write_xaiger to preserve POs even if driven by constant
2019-06-12 15:44:30 -07:00
Eddie Hung
2e7b3eee40
Add a couple more tests
2019-06-12 15:43:43 -07:00
Eddie Hung
14e870d4c4
More write_xaiger cleanup
2019-06-12 10:00:57 -07:00
Eddie Hung
4be417f6e1
Cleanup write_xaiger
2019-06-12 09:53:14 -07:00
Eddie Hung
b21d29598a
Consistency
2019-06-12 09:40:51 -07:00
Eddie Hung
7b186740d3
Add log_assert to ensure no loops
2019-06-04 12:01:25 -07:00
Eddie Hung
1b836c93bb
Only toposort builtin and abc types
2019-06-04 11:56:58 -07:00
Eddie Hung
257f7ff5f6
When creating new holes cell, inherit parameters too
2019-06-03 12:30:54 -07:00
Eddie Hung
4623177655
ABC9 to understand flops
2019-05-31 15:23:33 -07:00
Eddie Hung
eb08e71bd1
Merge branch 'xaig' into xc7mux
2019-05-31 13:03:03 -07:00
Eddie Hung
887c31f33b
Fix issue where keep signal became PI, but also box was adding CI driver
2019-05-30 16:03:22 -07:00
Eddie Hung
e3c8132d7a
Do not re-sort box_module ports
2019-05-30 12:26:51 -07:00
Eddie Hung
fdfc18be91
Carry in/out to be the last input/output for chains to be preserved
2019-05-30 01:23:36 -07:00
Eddie Hung
1423384367
Fix abc_test024
2019-05-29 15:24:09 -07:00
Eddie Hung
b4321a31bb
Fix for abc9_test022
2019-05-28 12:42:17 -07:00
Eddie Hung
13e233217c
Small improvement
2019-05-28 11:29:59 -07:00
Eddie Hung
3f60061615
Map file to include boxes not CI/CO
2019-05-27 23:10:59 -07:00
Eddie Hung
234156c01a
Instantiate cell type (from sym file) otherwise 'clean' warnings
2019-05-27 12:16:10 -07:00
Eddie Hung
03b289a851
Add 'cinput' and 'coutput' to symbols file for boxes
2019-05-27 11:38:52 -07:00
Eddie Hung
3c8368454f
Fix "a" connectivity
2019-05-26 14:14:13 -07:00
Eddie Hung
67f7c64a77
Fix padding, remove CIs from undriven_bits before erasing undriven POs
2019-05-26 11:26:38 -07:00
Eddie Hung
32a4c10c0d
Fix "a" extension
2019-05-26 02:44:36 -07:00
Eddie Hung
01684643b6
Fix "write_xaiger", and to write each box contents into holes
2019-05-25 22:34:50 -07:00
Eddie Hung
0f094fba08
Pad all boxes so that all input/output connections specified
2019-05-21 16:19:23 -07:00
Eddie Hung
eec314e262
Remove topo sort no-loop assertion, with test
2019-04-24 21:06:53 -07:00
Eddie Hung
ac2aff9e28
Fix abc9 with (* keep *) wires
2019-04-23 16:11:39 -07:00
Eddie Hung
bfd71e0990
Fix abc9 with (* keep *) wires
2019-04-23 16:11:14 -07:00
Eddie Hung
8f30019b68
Revert "Temporarily remove 'r' extension"
...
This reverts commit eaf3c24772
.
2019-04-22 17:41:21 -07:00
Eddie Hung
eaf3c24772
Temporarily remove 'r' extension
2019-04-22 11:54:19 -07:00
Eddie Hung
b780c0a7de
Allow POs to be PIs in XAIG
2019-04-22 11:22:29 -07:00
Eddie Hung
76bba49182
Fixes for simple_abc9 tests
2019-04-19 15:47:36 -07:00
Eddie Hung
35f44f3ae8
Do not assume inst_module is always present
2019-04-19 08:44:53 -07:00
Eddie Hung
3544a7cd7b
ignore_boxes -> holes_mode
2019-04-19 08:37:10 -07:00
Eddie Hung
6bdf98d591
Add flop support for write_xaiger
2019-04-18 17:43:13 -07:00
Eddie Hung
b531efd6d9
Spelling
2019-04-18 17:35:16 -07:00
Eddie Hung
4c327cf316
Use new -wb flag for ABC flow
2019-04-18 10:32:41 -07:00
Eddie Hung
23cd2e5de0
Fix $anyseq warning and cleanup
2019-04-17 16:03:29 -07:00
Eddie Hung
1ec5f18346
Cope with inout ports
2019-04-17 14:43:45 -07:00
Eddie Hung
2b860809e9
Stop topological sort at abc_flop_q
2019-04-17 12:28:19 -07:00
Eddie Hung
d59185f1d6
Remove init* from xaiger, also topo-sort cells for box flow
2019-04-17 11:08:42 -07:00
Eddie Hung
5c134980c4
Optimise
2019-04-16 21:05:44 -07:00
Eddie Hung
e7a8955818
CIs before PIs; also sort each cell's connections before iterating
2019-04-16 16:37:47 -07:00
Eddie Hung
55a3638c71
Port from xc7mux branch
2019-04-16 15:01:45 -07:00
Eddie Hung
fe0b421212
Output __const0__ and __const1__ CIs
2019-04-12 18:16:25 -07:00
Eddie Hung
686e772f0b
ci_bits and co_bits now a list, order is important for ABC
2019-04-12 16:17:48 -07:00
Eddie Hung
c748391730
WIP
2019-04-12 14:13:11 -07:00
Eddie Hung
2217d59e29
Add non-input bits driven by unrecognised cells as ci_bits
2019-04-10 18:06:33 -07:00
Eddie Hung
8e883d92ed
write_xaiger to behave for undriven/unused inouts
2019-02-26 12:17:51 -08:00
Eddie Hung
c492a3a1c4
write_xaiger duplicate inout port into out port with $inout.out suffix
2019-02-25 18:39:36 -08:00
Eddie Hung
292f80d231
Cleanup abc9 code
2019-02-25 15:20:56 -08:00
Eddie Hung
5180338e80
write_xaiger to write __dummy_o__ for -symbols too
2019-02-21 17:03:18 -08:00
Eddie Hung
085ed9f487
Add attribution
2019-02-21 14:40:13 -08:00
Eddie Hung
2f96a0ed32
write_xaiger to use original bit for co, not sigmap()-ed bit
2019-02-21 11:15:25 -08:00
Eddie Hung
01f8d50ba2
Remove swap file
2019-02-20 16:17:01 -08:00
Eddie Hung
f89b112fbf
write_aiger: fix CI/CO and symbols
2019-02-20 15:35:32 -08:00
Eddie Hung
ef60ca1717
write_xaiger to not write latches, CO/PO fixes
2019-02-20 11:09:13 -08:00
Eddie Hung
30f1204721
Cleanup
2019-02-16 22:22:17 -08:00
Eddie Hung
76c35f80f4
Cleanup
2019-02-16 21:09:48 -08:00
Eddie Hung
6a57de9013
write_xaiger to support non-bit cell connections, and cope with COs for -O
2019-02-16 21:00:39 -08:00
Eddie Hung
b9a305b85d
write_aiger -O to write dummy output as __dummy_o__
2019-02-16 20:08:59 -08:00
Eddie Hung
0c409e6d8c
Tidy up write_xaiger
2019-02-16 08:48:33 -08:00
Eddie Hung
2c1655ae94
write_aiger() to perform CI/CO post-processing and fix symbols
2019-02-16 08:46:25 -08:00
Eddie Hung
486a270415
Fixes needed for DFF circuits
2019-02-15 15:22:18 -08:00
Eddie Hung
3ac5b65197
write_xaiger to cope with unknown cells by transforming them to CI/CO
2019-02-15 11:51:21 -08:00
Eddie Hung
c69fba8de5
More cleanup
2019-02-14 14:52:47 -08:00
Eddie Hung
7328775584
More cleanup of write_xaiger
2019-02-14 14:48:38 -08:00
Eddie Hung
afa4389445
Get rid of formal stuff from xaiger backend
2019-02-14 13:27:26 -08:00
Eddie Hung
ecd2446132
Add write_xaiger
2019-02-11 15:18:42 -08:00
Eddie Hung
db08afe146
Copy backends/aiger/aiger.cc to xaiger.cc
2019-02-08 14:53:12 -08:00
Clifford Wolf
82aaf6d908
Add "write_aiger -I -O -B"
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-11-12 09:27:33 +01:00
Henner Zeller
3aa4484a3c
Consistent use of 'override' for virtual methods in derived classes.
...
o Not all derived methods were marked 'override', but it is a great
feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
use the plain keyword going forward now that C++11 is established)
2018-07-20 23:51:06 -07:00
Clifford Wolf
5442554e6f
Fix generation of multiple outputs for same AIG node in write_aiger
2017-07-05 14:23:54 +02:00
Clifford Wolf
287831dca3
Include output ports with constant driver in AIGER output
2017-07-03 14:53:17 +02:00
Clifford Wolf
c365e33fd7
Fix AIGER back-end for multiple symbols per input/latch/output/property
2017-05-30 19:09:11 +02:00
Clifford Wolf
9ed4c9d710
Improve write_aiger handling of unconnected nets and constants
2017-05-28 11:31:35 +02:00
Clifford Wolf
a6ca28276e
Add write_aiger $anyseq support
2017-03-02 16:39:48 +01:00
Clifford Wolf
dac0842d61
Add $live and $fair support to AIGER back-end.
2017-02-25 13:07:15 +01:00
Clifford Wolf
a61c88f122
Added $anyconst support to AIGER back-end
2016-12-11 13:48:18 +01:00
Clifford Wolf
a44cc7a3d1
Added $assert/$assume support to AIGER back-end
2016-12-03 13:20:29 +01:00
Clifford Wolf
5fa1fa1e6f
Added "write_aiger -zinit -symbols -vmap"
2016-12-01 11:04:36 +01:00
Clifford Wolf
c1f762ca56
Added "write_aiger" command
2016-11-30 21:30:24 +01:00