mirror of https://github.com/YosysHQ/yosys.git
More cleanup of write_xaiger
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afa4389445
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7328775584
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@ -45,8 +45,6 @@ struct XAigerWriter
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pool<SigBit> input_bits, output_bits;
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dict<SigBit, SigBit> not_map, ff_map, alias_map;
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dict<SigBit, pair<SigBit, SigBit>> and_map;
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vector<pair<SigBit, SigBit>> asserts, assumes;
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vector<pair<SigBit, SigBit>> liveness, fairness;
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pool<SigBit> initstate_bits;
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vector<pair<int, int>> aig_gates;
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@ -249,12 +247,6 @@ struct XAigerWriter
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}
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}
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int fair_live_inputs_cnt = GetSize(liveness);
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int fair_live_inputs_m = aig_m;
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aig_m += fair_live_inputs_cnt;
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aig_i += fair_live_inputs_cnt;
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for (auto it : ff_map) {
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aig_m++, aig_l++;
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aig_map[it.first] = 2*aig_m;
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@ -271,16 +263,6 @@ struct XAigerWriter
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aig_latchinit.push_back(0);
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}
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int fair_live_latches_cnt = GetSize(fairness) + 2*GetSize(liveness);
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int fair_live_latches_m = aig_m;
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int fair_live_latches_l = aig_l;
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aig_m += fair_live_latches_cnt;
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aig_l += fair_live_latches_cnt;
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for (int i = 0; i < fair_live_latches_cnt; i++)
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aig_latchinit.push_back(0);
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if (zinit_mode)
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{
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for (auto it : ff_map)
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@ -322,64 +304,10 @@ struct XAigerWriter
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aig_outputs.push_back(0);
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}
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for (auto it : asserts) {
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aig_b++;
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int bit_a = bit2aig(it.first);
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int bit_en = bit2aig(it.second);
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aig_outputs.push_back(mkgate(bit_a^1, bit_en));
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}
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if (bmode && asserts.empty()) {
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if (bmode) {
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aig_b++;
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aig_outputs.push_back(0);
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}
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for (auto it : assumes) {
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aig_c++;
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int bit_a = bit2aig(it.first);
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int bit_en = bit2aig(it.second);
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aig_outputs.push_back(mkgate(bit_a^1, bit_en)^1);
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}
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for (auto it : liveness)
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{
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int input_m = ++fair_live_inputs_m;
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int latch_m1 = ++fair_live_latches_m;
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int latch_m2 = ++fair_live_latches_m;
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log_assert(GetSize(aig_latchin) == fair_live_latches_l);
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fair_live_latches_l += 2;
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int bit_a = bit2aig(it.first);
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int bit_en = bit2aig(it.second);
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int bit_s = 2*input_m;
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int bit_q1 = 2*latch_m1;
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int bit_q2 = 2*latch_m2;
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int bit_d1 = mkgate(mkgate(bit_s, bit_en)^1, bit_q1^1)^1;
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int bit_d2 = mkgate(mkgate(bit_d1, bit_a)^1, bit_q2^1)^1;
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aig_j++;
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aig_latchin.push_back(bit_d1);
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aig_latchin.push_back(bit_d2);
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aig_outputs.push_back(mkgate(bit_q1, bit_q2^1));
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}
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for (auto it : fairness)
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{
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int latch_m = ++fair_live_latches_m;
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log_assert(GetSize(aig_latchin) == fair_live_latches_l);
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fair_live_latches_l += 1;
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int bit_a = bit2aig(it.first);
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int bit_en = bit2aig(it.second);
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int bit_q = 2*latch_m;
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aig_f++;
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aig_latchin.push_back(mkgate(mkgate(bit_q^1, bit_en^1)^1, bit_a^1));
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aig_outputs.push_back(bit_q^1);
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}
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}
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void write_aiger(std::ostream &f, bool ascii_mode, bool miter_mode, bool symbols_mode)
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