Clifford Wolf
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23a7973094
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Added support for shifter cells to SAT generator
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2013-06-08 15:12:08 +02:00 |
Clifford Wolf
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92f04eab10
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Added "cd" and "ls" commands for convenience
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2013-06-08 14:45:28 +02:00 |
Clifford Wolf
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1434312fdd
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Various improvements in sat_solve pass and SAT generator
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2013-06-08 14:11:50 +02:00 |
Clifford Wolf
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99957a825f
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Added -all and -max options to sat_solve
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2013-06-08 12:17:30 +02:00 |
Clifford Wolf
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25ae2d4df0
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Fixes and improvements in ezSAT library
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2013-06-08 12:14:20 +02:00 |
Clifford Wolf
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c681c17038
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Improved auto-detection of -show signals in sat_solve
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2013-06-08 09:34:36 +02:00 |
Clifford Wolf
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56b593b91c
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Improved sat generator and sat_solve pass
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2013-06-07 14:37:33 +02:00 |
Clifford Wolf
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46fbe9d262
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Added SAT generator and simple sat_solve command
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2013-06-07 13:59:13 +02:00 |
Clifford Wolf
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3371563f2f
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Added ezSAT library
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2013-06-07 10:38:35 +02:00 |
Clifford Wolf
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c32b918681
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Renamed opt_rmunused to opt_clean
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2013-06-05 07:07:31 +02:00 |
Clifford Wolf
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29d6ebd961
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Implemented technology mapping for multipliers (using array multiplier)
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2013-06-03 12:48:44 +02:00 |
Clifford Wolf
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21d9251e52
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Added "dump" command (part ilang backend)
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2013-06-02 17:53:30 +02:00 |
Clifford Wolf
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5f2c5f9017
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Fixed techmap/flatten for positional module arguments
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2013-05-26 12:21:17 +02:00 |
Clifford Wolf
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b11d9408d9
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Improved log messages generated by hierarchy pass
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2013-05-26 12:20:51 +02:00 |
Clifford Wolf
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cc587fb5f3
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Added -nodetect option to fsm pass
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2013-05-24 15:34:25 +02:00 |
Clifford Wolf
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cc05404128
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Fixed undef behavior in tests/asicworld/code_verilog_tutorial_fsm_full_tb.v
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2013-05-24 15:15:59 +02:00 |
Clifford Wolf
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66bc46b30b
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Improved FSM one-hot encoding, added binary encoding
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2013-05-24 14:39:19 +02:00 |
Clifford Wolf
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ed0e2f7a6f
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Added log_assert() api
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2013-05-24 14:38:36 +02:00 |
Clifford Wolf
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ccd2a93439
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Added log_abort() api
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2013-05-24 12:32:06 +02:00 |
Clifford Wolf
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585fcace10
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Fixed a gcc vs. clang determinism problem in abc pass
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2013-05-23 16:17:23 +02:00 |
Clifford Wolf
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f674150f1c
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Fixed memory corruption bug in opt_rmunused
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2013-05-23 13:19:28 +02:00 |
Clifford Wolf
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cbe423a1fe
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Only initialize TCL interpreter when needed
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2013-05-23 12:56:23 +02:00 |
Clifford Wolf
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375f83c5ec
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Fixed memory leak in ilang frontend
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2013-05-23 12:55:59 +02:00 |
Clifford Wolf
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e04d88cf22
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Added missing newline to some error messages
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2013-05-23 11:19:33 +02:00 |
Clifford Wolf
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6a38e767ba
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Added labels to "help -write-tex-command-reference-manual" output
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2013-05-23 09:49:37 +02:00 |
Clifford Wolf
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ebb155b2d5
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Added support for processes to show command
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2013-05-23 09:15:51 +02:00 |
Clifford Wolf
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04996657c8
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Fixed show command for constant assignments
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2013-05-23 08:22:44 +02:00 |
Clifford Wolf
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3b8882ae49
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Some improvements in opt_rmdff
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2013-05-23 07:48:18 +02:00 |
Clifford Wolf
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63e6a35ce2
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Merge pull request #6 from hansiglaser/master
added option '-Dname[=definition]' to command 'read_verilog'
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2013-05-19 16:07:55 -07:00 |
Johann Glaser
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10a195c0a1
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added option '-Dname[=definition]' to command 'read_verilog'
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2013-05-19 17:07:52 +02:00 |
Clifford Wolf
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fbadb54b9b
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Removed test cases that have been moved to yosys-test.
https://github.com/cliffordwolf/yosys-tests/
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2013-05-17 15:32:30 +02:00 |
Clifford Wolf
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3ecc314238
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Fixed to aggressive x-folding in opt_const
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2013-05-17 14:55:18 +02:00 |
Clifford Wolf
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59d0c75b98
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Merge branch 'master' of github.com:cliffordwolf/yosys
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2013-05-16 16:51:47 +02:00 |
Clifford Wolf
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c5ee2b306a
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Merge branch 'bugfix'
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2013-05-16 16:44:45 +02:00 |
Clifford Wolf
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6cc8e848b6
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Fixed synthesis of functions in latched blocks
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2013-05-16 16:44:06 +02:00 |
Clifford Wolf
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ff4a1dd06c
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Improved vcdcd.pl (added -d option)
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2013-05-14 09:41:47 +02:00 |
Clifford Wolf
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be8ecd6d16
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Some improvements in vcdcd.pl
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2013-05-14 08:50:59 +02:00 |
Clifford Wolf
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b56e06d2f5
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Added support for verilog === operator
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2013-05-07 14:35:40 +02:00 |
Clifford Wolf
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595db0d7b9
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Added tcl "yosys -import" command
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2013-05-02 15:27:01 +02:00 |
Clifford Wolf
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97f783e668
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Improved/simplified TCL bindings
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2013-05-01 14:21:03 +02:00 |
Clifford Wolf
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83c743f717
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Added support for const cell inputs in techmap
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2013-04-27 18:30:29 +02:00 |
Clifford Wolf
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7d0a274f12
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Fixed README for new show command behavior (svg vs. ps)
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2013-04-27 14:41:46 +02:00 |
Clifford Wolf
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b1cb4d7871
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Added "flatten" pass
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2013-04-26 14:40:45 +02:00 |
Clifford Wolf
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8f2d90de4f
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Fixed handling of positional module parameters
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2013-04-26 14:40:25 +02:00 |
Clifford Wolf
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94744ac7b0
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Fixed hierarchy pass for hierarchies of parametric modules
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2013-04-26 13:28:15 +02:00 |
Clifford Wolf
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453a29c9f6
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Only use sha1 checksums for names of parametric modules when the verbose form is to long
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2013-04-26 13:13:58 +02:00 |
Clifford Wolf
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e6dca3445a
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Fixed "show -format ..." command line parsing
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2013-04-15 11:59:35 +02:00 |
Clifford Wolf
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6626aad29a
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Added "submod -name ..." support
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2013-04-15 11:58:24 +02:00 |
Clifford Wolf
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e0c408cb4a
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Fixed a bug in AST frontend for cases with non-blocking assigned variables as case values
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2013-04-13 21:19:10 +02:00 |
Clifford Wolf
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c6198ea5a8
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Fixed a bug in opt_const when optimizing 1-bit compares with constants
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2013-04-13 21:18:24 +02:00 |