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Added support for verilog === operator

This commit is contained in:
Clifford Wolf 2013-05-07 14:35:40 +02:00
parent 595db0d7b9
commit b56e06d2f5
1 changed files with 2 additions and 0 deletions
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frontends/verilog/lexer.l
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@ -233,6 +233,8 @@ supply1 { return TOK_SUPPLY1; }
"<=" { return OP_LE; }
">=" { return OP_GE; }
"===" { return OP_EQ; }
/* "~&" { return OP_NAND; } */
/* "~|" { return OP_NOR; } */
"~^" { return OP_XNOR; }