manarabdelaty
966b1f22bb
[DATA] Update digital_pll
2021-12-07 13:19:02 +02:00
manarabdelaty
aa766f9144
[DATA] Update caravel_clocking module
2021-12-05 19:44:28 +02:00
manarabdelaty
ef1019b62a
[DATA] Update caravel_clocking
2021-12-02 22:50:20 +02:00
manarabdelaty
0067bd5b7c
[DATA] Update caravel_clocking/digital_pll/housekeeping
2021-12-02 21:09:43 +02:00
manarabdelaty
c4efcec989
[DATA] Update housekeeping views
2021-11-30 13:00:33 +02:00
Tim Edwards
e2ee74c591
Changed "simple_por" in both caravel and caravan to be an abstract
...
view pointing to the contents of ../gds/ so that when the assembled
chip's GDS is generated with "cif *hier write disable", the POR
will continue to have the GDS with the proper hierarchical processing.
2021-11-27 11:51:30 -05:00
Tim Edwards
f67f7b6daf
Corrected bad paths on two layouts in mag/ and most of the layouts
...
in maglef/, all of which were erroneously pointing to paths in
either OpenLane or the user's home directory path.
2021-11-26 20:00:47 -05:00
manarabdelaty
8b1c5df909
[DATA] Update caravel_clocking module (timing clean)
2021-11-25 15:23:01 +02:00
manarabdelaty
05278ec738
[DATA] Update HK views (timing clean)
2021-11-25 12:54:22 +02:00
manarabdelaty
83e150bf25
[DATA] Add spare_logic_block
2021-11-24 20:36:23 +02:00
manarabdelaty
331fdee2bb
[DATA] Update HK module (li1 routing: 249um)
2021-11-20 15:13:16 +02:00
manarabdelaty
37fb2d6766
[DATA] update caravel_clocking module (removed long li1 routes, in total it used 8um from li1)
2021-11-20 13:07:23 +02:00
manarabdelaty
581a22de6a
[DATA] Update mgmt_protect (removed all li1 routing )
2021-11-19 13:11:18 +02:00
manarabdelaty
61bf3c651e
[DATA] Update mgmt_protect pin placement
2021-11-19 01:33:11 +02:00
manarabdelaty
53b3a9013e
[DATA] Update HK pin placement
2021-11-19 01:30:14 +02:00
manarabdelaty
37a07e291b
[DATA] Update digital_pll pin placement to have it align with the HK
2021-11-19 01:28:40 +02:00
manarabdelaty
64bdd6230d
[DATA] Update caravel_clocking module floorplan
2021-11-19 01:26:29 +02:00
manarabdelaty
46540437af
[DATA] Add gds/lef/maglef/gl views for the user_id_programming block
2021-11-15 18:17:32 +02:00
manarabdelaty
6203460f57
[DATA] Add views for xres_buf
2021-11-15 18:07:02 +02:00
manarabdelaty
72b2c724c9
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00
manarabdelaty
56f672bbd8
[DATA] Add HK views
2021-11-15 13:23:54 +02:00
manarabdelaty
85a1ffc5aa
[DATA] Add views for the mgmt_protect
2021-11-15 13:21:52 +02:00
manarabdelaty
bee7b4ed78
Add initial config for the digital_pll
2021-11-08 13:34:59 +02:00
manarabdelaty
59076d499a
Update gpio_defaults_block to align the pins with the gpio_control_block
2021-11-05 23:27:32 +02:00
manarabdelaty
e68664101c
Update gpio_control_block
2021-11-05 16:54:55 +02:00
manarabdelaty
53b09f43d1
Add gpio_defaults_block views
2021-11-05 12:33:36 +02:00
manarabdelaty
78ce7265c1
Update gpio_control block
2021-11-04 17:58:58 +02:00
manarabdelaty
cb9990f97e
harden gpio_control_block
2021-11-04 16:19:12 +02:00