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caravel
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897 Commits 140 Branches 61 Tags 15 GiB
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60 Commits

Author SHA1 Message Date
M0stafaRady 55671cded1 fix bug at bit bang tests 2022-10-15 18:10:33 -07:00
M0stafaRady aac5408dfe initial version of debug test 2022-10-15 11:40:39 -07:00
M0stafaRady fb1259dd56 Fix gpio control block access in gatelevel 2022-10-15 09:30:11 -07:00
M0stafaRady 14ebfa5259 fix bug in bitbang_no_cpu_all_o testbench 2022-10-15 04:18:05 -07:00
M0stafaRady 422bb26ca0 Optimize and update mem tests - script is generating new linker script for the test to be all to test the whole dff or dff2 memory 2022-10-14 17:12:45 -07:00
M0stafaRady 1bae9af845 delete trash files 2022-10-13 09:55:18 -07:00
M0stafaRady 1d8eac5f48 Merge branch 'cocotb' of github.com:efabless/caravel into cocotb 2022-10-13 08:18:17 -07:00
M0stafaRady 86f2c04d3e Add mem_dff2 test and update script to change the linker script 2022-10-13 08:18:08 -07:00
M0stafaRady 8991af8ff1 Merge branch 'cocotb' of github.com:efabless/caravel into cocotb 2022-10-13 04:25:18 -07:00
M0stafaRady 5d3766edf7 update script and top level testbench for sdf 2022-10-13 04:25:14 -07:00
M0stafaRady f5e1060c6d Merge branch 'cocotb' of github.com:efabless/caravel into cocotb 2022-10-13 04:05:38 -07:00
M0stafaRady ceac6defa1 fix some tests for gatelevel 2022-10-13 04:05:12 -07:00
M0stafaRady 95cca2dec0 optimize bitbang tests 2022-10-12 16:06:02 -07:00
M0stafaRady dce509ab11 update script and testbench top level to include sdf 2022-10-12 14:41:37 -07:00
M0stafaRady e8870d6a8b fix errors for gate level 2022-10-12 10:29:56 -07:00
M0stafaRady d994a2e741 Merge branch 'cocotb' of github.com:efabless/caravel into cocotb 2022-10-12 03:57:33 -07:00
M0stafaRady d464a475e0 update gpio tests to release housekeeping spi csb 2022-10-12 03:57:22 -07:00
M0stafaRady 685518477d add folder to store important sessions 2022-10-12 02:03:06 -07:00
M0stafaRady 2a5c7b876b fix some timeout and errors due to cpu became slower and sram interface are deleted 2022-10-11 14:00:49 -07:00
M0stafaRady 3fe7f3f38b fix tests timeout 2022-10-11 06:04:16 -07:00
M0stafaRady 7fe790649d Add gpio_all_bidir_user test 2022-10-10 15:59:20 -07:00
M0stafaRady 8cca3a5002 Add gpio_all_i_pd_user and gpio_all_i_pu_user 2022-10-10 14:49:24 -07:00
M0stafaRady a572a8ec14 add gpio_all_i_user test 2022-10-10 09:07:32 -07:00
M0stafaRady e2245ad333 enhance gpio_all_i test to include more checkers 2022-10-10 07:42:02 -07:00
M0stafaRady 688429eeda move caravel.py, cpu.py ... to interfaces directory 2022-10-10 04:50:45 -07:00
M0stafaRady 00364eb092 Add gpio_all_o_user test 2022-10-09 07:53:25 -07:00
M0stafaRady 1690c8e068 enhance gpio_all_o test 2022-10-09 06:07:19 -07:00
M0stafaRady 08229d6a9b Add gpio_all_bidir test but it still not working yet 2022-10-09 05:08:12 -07:00
M0stafaRady e94a8e0477 add test la test 2022-10-08 06:25:26 -07:00
M0stafaRady d90001eac2 update caravel.py to disable bin 3 also 2022-10-08 01:56:41 -07:00
M0stafaRady 0f167fc041 update timeout for gpio_all_i_pd and gpio_all_i_pu 2022-10-07 07:02:09 -07:00
M0stafaRady f072e9cb2d Add gpio_all_i_pd 2022-10-07 06:41:21 -07:00
M0stafaRady e1eba1d534 update gpio_all_i_pu test 2022-10-07 06:04:18 -07:00
M0stafaRady 4f483adb36 update hk_regs_wr_wb_cpu test to include all house keeping regs 2022-10-06 11:16:07 -07:00
M0stafaRady 7e407e1155 Add test hk_disable 2022-10-06 10:12:12 -07:00
M0stafaRady 28b453783f Add clock redirect test 2022-10-06 09:20:06 -07:00
M0stafaRady fb34d9a541 update input tests to cover the gpio from 32 to 37 2022-10-06 05:32:46 -07:00
M0stafaRady 8e72d5e13e Add test uart_loopback 2022-10-06 03:12:44 -07:00
M0stafaRady 6830c79ae8 fix uart_rx tests by sending in reverse and use uart_ev_pending_write(UART_EV_RX); 2022-10-06 02:14:59 -07:00
M0stafaRady a6e7b46128 delete reading from uart register in uart_rx test 2022-10-05 15:07:38 -07:00
M0stafaRady 78613c95cc increase timeout for uart_rx and add uart_ev_pending_write 2022-10-05 15:02:07 -07:00
M0stafaRady 8e21a2f722 Add test pll 2022-10-05 13:58:36 -07:00
M0stafaRady b31efbdeea IO[0] affects the uart selecting btw system and debug 2022-10-05 13:47:23 -07:00
M0stafaRady 4610f6b004 Add trial of test gpio_all_i_pu still not work 2022-10-05 08:22:51 -07:00
M0stafaRady e2b345dcbb Add new test user_pass_thru_rd 2022-10-04 10:55:53 -07:00
M0stafaRady 5e523bce5b Add spi master temp created to simulate the silicon validation test and to be removed after 2022-10-04 10:46:34 -07:00
M0stafaRady 11330823b7 Add hk_regs_wr_wb_cpu test 2022-10-04 03:24:15 -07:00
M0stafaRady ef9c2e408b fix bug at IRQ_uart 2022-10-03 09:49:51 -07:00
M0stafaRady e81416bb51 add new test mgmt_gpio_bidir 2022-10-03 08:56:46 -07:00
M0stafaRady e945c3b882 fix bug at mgmt_gpio_out by increasing the number of phases 2022-10-03 05:45:55 -07:00