mirror of https://github.com/efabless/caravel.git
fix uart_rx tests by sending in reverse and use uart_ev_pending_write(UART_EV_RX);
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@ -61,7 +61,7 @@ async def start_of_tx(caravelEnv):
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@cocotb.test()
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@repot_test
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async def uart_rx(dut):
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caravelEnv,clock = await test_configure(dut,timeout_cycles=11195844)
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caravelEnv,clock = await test_configure(dut,timeout_cycles=104029)
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cpu = RiskV(dut)
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cpu.cpu_force_reset()
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cpu.cpu_release_reset()
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@ -95,7 +95,7 @@ async def uart_send_char(caravelEnv,char):
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caravelEnv.drive_gpio_in((5,5),0)
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await Timer(bit_time_ns, units='ns')
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#send bits
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for i in range(8):
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for i in reversed(range(8)):
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caravelEnv.drive_gpio_in((5,5),char_bits[i])
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await Timer(bit_time_ns, units='ns')
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@ -113,14 +113,14 @@ async def uart_send_char(caravelEnv,char):
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async def uart_check_char_recieved(caravelEnv,cpu):
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# check cpu recieved the correct character
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while True:
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# reg_uart_data = caravelEnv.caravel_hdl.soc.core.uart_rxtx_w.value.binstr
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reg_uart_data = caravelEnv.caravel_hdl.soc.core.uart_rxtx_w.value.binstr
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reg1 = cpu.read_debug_reg1()
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cocotb.log.debug(f"[TEST] reg1 = {hex(reg1)}")
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if reg1 == 0x1B:
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cocotb.log.info(f"[TEST] Pass cpu has recieved the correct character ")
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cocotb.log.info(f"[TEST] Pass cpu has recieved the correct character {chr(int(reg_uart_data,2))}")
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return
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if reg1 == 0x1E:
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cocotb.log.error(f"[TEST] Failed cpu has recieved the wrong character ")
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cocotb.log.error(f"[TEST] Failed cpu has recieved the wrong character {chr(int(reg_uart_data,2))}")
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return
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await ClockCycles(caravelEnv.clk,1)
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@ -24,10 +24,10 @@ void wait_for_char(char *c){
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while (uart_rxempty_read() == 1);
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if (reg_uart_data == *c){
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reg_debug_1 = 0x1B; // recieved the correct character
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uart_ev_pending_write(UART_EV_RX);
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}else{
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reg_debug_1 = 0x1E; // timeout didn't recieve the character
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}
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uart_ev_pending_write(UART_EV_RX);
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}
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