From 6830c79ae8deb0e3ffec8523cc54339e29a196ee Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Thu, 6 Oct 2022 02:14:59 -0700 Subject: [PATCH] fix uart_rx tests by sending in reverse and use uart_ev_pending_write(UART_EV_RX); --- verilog/dv/cocotb/tests/uart/uart.py | 10 +++++----- verilog/dv/cocotb/tests/uart/uart_rx.c | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/verilog/dv/cocotb/tests/uart/uart.py b/verilog/dv/cocotb/tests/uart/uart.py index 9446fb4c..af965acc 100644 --- a/verilog/dv/cocotb/tests/uart/uart.py +++ b/verilog/dv/cocotb/tests/uart/uart.py @@ -61,7 +61,7 @@ async def start_of_tx(caravelEnv): @cocotb.test() @repot_test async def uart_rx(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=11195844) + caravelEnv,clock = await test_configure(dut,timeout_cycles=104029) cpu = RiskV(dut) cpu.cpu_force_reset() cpu.cpu_release_reset() @@ -95,7 +95,7 @@ async def uart_send_char(caravelEnv,char): caravelEnv.drive_gpio_in((5,5),0) await Timer(bit_time_ns, units='ns') #send bits - for i in range(8): + for i in reversed(range(8)): caravelEnv.drive_gpio_in((5,5),char_bits[i]) await Timer(bit_time_ns, units='ns') @@ -113,14 +113,14 @@ async def uart_send_char(caravelEnv,char): async def uart_check_char_recieved(caravelEnv,cpu): # check cpu recieved the correct character while True: - # reg_uart_data = caravelEnv.caravel_hdl.soc.core.uart_rxtx_w.value.binstr + reg_uart_data = caravelEnv.caravel_hdl.soc.core.uart_rxtx_w.value.binstr reg1 = cpu.read_debug_reg1() cocotb.log.debug(f"[TEST] reg1 = {hex(reg1)}") if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass cpu has recieved the correct character ") + cocotb.log.info(f"[TEST] Pass cpu has recieved the correct character {chr(int(reg_uart_data,2))}") return if reg1 == 0x1E: - cocotb.log.error(f"[TEST] Failed cpu has recieved the wrong character ") + cocotb.log.error(f"[TEST] Failed cpu has recieved the wrong character {chr(int(reg_uart_data,2))}") return await ClockCycles(caravelEnv.clk,1) \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/uart/uart_rx.c b/verilog/dv/cocotb/tests/uart/uart_rx.c index bb50c117..ce23de00 100644 --- a/verilog/dv/cocotb/tests/uart/uart_rx.c +++ b/verilog/dv/cocotb/tests/uart/uart_rx.c @@ -24,10 +24,10 @@ void wait_for_char(char *c){ while (uart_rxempty_read() == 1); if (reg_uart_data == *c){ reg_debug_1 = 0x1B; // recieved the correct character - uart_ev_pending_write(UART_EV_RX); }else{ reg_debug_1 = 0x1E; // timeout didn't recieve the character } + uart_ev_pending_write(UART_EV_RX); }