Commit Graph

422 Commits

Author SHA1 Message Date
marwaneltoukhy c824608e25 Merge branch 'main' into caravel_redesign-2 2022-10-28 13:33:35 -07:00
mo-hosni b5010be8a7 Update Openlane views 2022-10-27 09:53:45 -07:00
mo-hosni 2d61e593aa Decreased distances from pins to and gates in mgmt_protect 2022-10-27 08:20:57 -07:00
Marwan Abbas 18d779f5cd removed caravel-eco.v gl netlist and added the eco for porb_h_in in caravel.v 2022-10-24 17:58:50 +02:00
M0stafaRady 523fa3a5bb
cooctb- update gpio tests for caravan (#341)
* update gpio tests for caravan

* cocotb - Add gpio caravan tests
2022-10-22 12:14:25 -07:00
R. Timothy Edwards 30d35947f1
Added decap cells to the gate-level verilog for the (#343)
gpio_signal_buffering_alt cell (caravan chip).  This was
previously done for gpio_signal_buffering (caravel chip) but
the same thing had not previously been done for caravan.
2022-10-22 12:12:06 -07:00
marwaneltoukhy 66b7293817 signoff views for caravan 2022-10-22 07:01:29 -07:00
kareem 0be31a26c1 reharden: caravan
~ reimplement after rtl changes
2022-10-22 02:52:02 -07:00
R. Timothy Edwards d9260dc533
Fixes to caravan for LVS and ERC (#330)
* Corrected missing part of porb_h route in the caravan chip_io_alt
layout.  Correcting the indexing of the "mprj_io_one" connections
to "mgmt_io_oeb" on the left-hand side of caravan, as they were
connecting back to the right side and making a mess of wiring,
instead of being wired locally directly to the nearest I/O.

* Apply automatic changes to Manifest and README.rst

* Corrected the unconnected mgmt_io_in inputs to housekeeping on
the caravan chip (which correspond to the GPIOs that do not exist
in caravan) by connecting them to the "zero" outputs of the
closest GPIO control blocks.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
2022-10-21 14:28:53 -07:00
Marwan Abbas 7db65f3e32
Added gl netlists for chip_io_alt and gpio_signal_buffering_alt (#327) 2022-10-21 12:06:20 -07:00
passant5 0c9e3a08fd
update caravel with tying `porb_h_in` with `por_l_in` (#326)
* update caravel with tying `porb_h_in` with `por_l_in` at the `mgmt_core_wrapper` in the top-level layout:
- `porb_h_in` shouldn't be left floating as it is an input to `clkbuf_16`

* add caravel-eco.gds (same as caravel.gds)
2022-10-21 11:52:00 -07:00
R. Timothy Edwards 5029d71df6
Syntax changes that are non-functional from a synthesis perspective. (#324)
* Syntax changes that are non-functional from a synthesis perspective.
There are a few errors that are caught by commercial tools and halt
synthesis, which are handled more gracefully by the open source
tool flow.  In housekeeping.v:  Some wires declared after they are
used.  In housekeeping_spi.v:  A non-blocking "=" assignment used
where a blocking "<-" assignment was intended.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
2022-10-21 10:10:20 -07:00
M0stafaRady 096f5035f5
cocotb - updates related to enable simulating caraval using iverilog (#320)
* cocotb - updates related to enable simulating caraval using iverilog

* Apply automatic changes to Manifest and README.rst

Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
2022-10-21 07:43:34 -07:00
Jeff DiCorpo 4192c34f4b
Caravan redesign (#321)
* Fixed caravan top level power routing and updated views for mag, gds and lef

* caravan(rtl): updates

~ typos fix
- remove unused pin in chip_io_alt
+ add caravan_power_routing verilog

* Apply automatic changes to Manifest and README.rst

* ~ update caravan openlane configs to add extra cell references
~ correct placment and cell names of some macro in caravan interactive script

* reharden: caravan

+ add non functional blocks
+ add an initial iteration of caravan

* Apply automatic changes to Manifest and README.rst

* Revert "Fixed caravan top level power routing and updated views for mag, gds and lef"

This reverts commit 70628f748a.

* fixed caravan top level power routing

* reharden: caravan

based on new power routing
~ guard rtl chip_io power pins in the power macro guard

* Apply automatic changes to Manifest and README.rst

* fixed caravan top level power routing

* rehadren: caravan

+ add caravan signal routing to openlane run
~ change rtl to guard power and analog against routing by
openlane by ifndef TOP_ROUTING
~ add pr bounadry for caravan signal routing to fix origin issues

* Apply automatic changes to Manifest and README.rst

* fix power connection in buffering block and regenerate gl

* Apply automatic changes to Manifest and README.rst

* updated views for caravan

* Added extract unique to lvs-gds-cell target. (#313)

* This fixes errors in the top level RTL of caravan that failed to
hook up the buffers through the SoC correctly.

* Apply automatic changes to Manifest and README.rst

* reharden: caravan

~ rtl updated

* fixed caravan mag top level

* updated views for caravan + signoff

* fixed top level cell name

* fix syntax error related to signal initialization place in caravan (#319)

* fix syntax error related to signal initialization place in caravan- fixed in caravel in another commit

* Apply automatic changes to Manifest and README.rst

Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>

* Apply automatic changes to Manifest and README.rst

Co-authored-by: Marwan Abbas <marwaneltoukhy@aucegypt.edu>
Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: kareefardi <kareefardi@users.noreply.github.com>
Co-authored-by: Mitch Bailey <d-m-bailey@users.noreply.github.com>
Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>
Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
Co-authored-by: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com>
Co-authored-by: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com>
Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
Co-authored-by: jeffdi <jeffdi@users.noreply.github.com>
2022-10-21 07:37:41 -07:00
M0stafaRady 9844ba5f21 cocotb - update documentation 2022-10-20 07:56:19 -07:00
M0stafaRady af9110c6dd cocotb - update verify_cocotb.py script to fully support running with iverilog in RTL and GL mode 2022-10-20 06:28:07 -07:00
M0stafaRady 98d089ed08 Move decleration of some signal in caravel.v to fix error in iverilog 2022-10-20 06:26:55 -07:00
M0stafaRady 891afe841b Merge branch 'caravel_redesign' into cocotb 2022-10-20 01:35:16 -07:00
Marwan Abbas 71b1faabc5
Caravel final views (#310)
* added views for each step of generating final caravel.gds

* generated the right caravel and caravel-eco gds

* renamed caravel_signoff and removed caravel-non-eco

Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
2022-10-19 18:27:26 -07:00
M0stafaRady 23b2045abe
consider test debug be use only dff in linkerscript since test write to the dff2 ram and align the addresses generated (#308) 2022-10-19 12:29:24 -07:00
Marwan Abbas bbb6bf775c
Caravel redesign new top (#300)
* reharden: caravel

~ shift caravel_clocking due to change in size
~ change the pr boundary of caravel_power_routing mag file
~ regenarate lef of caravel_power_routing

* update pdn for `caravel_clocking` & `digital_pll`

* added script to update and generate the power routing views

* ~ run update_power_routing_views from the caravel root with prboundary

* fix output message

* added power routing lef, mag and gds

* fix update_power_routing_views saving wrong cell name

* reharden: caravel

~ incorperate pdn changes
~ re-extract spefs

* fix caravel_power_routing views

* fix abs path in maglef views

* fix abs path in mag views
add substcut layers in gpio_control_block and mgmt_protect

* generate a new chip_io gds

* regenerate gpio_control_block due to mag and gds not in sync

* reharden: caravel

~ change config to pass clean routing
~ use updated views of macros

* lvs clean views

* add caravel top-level generated sdf for all corners

* fix absolute path for mgmt_core_wrapper

Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: Bassant Hassan <bassant.hassan@efabless.com>
2022-10-18 17:24:07 -07:00
M0stafaRady 9d1e4b35d7
Merge pull request #298 from efabless/cocotb-dev
cocotb - update script to store git info in the run git_show.log
2022-10-19 00:45:09 +02:00
M0stafaRady 340f776e46 cocotb - update script to store git info in the run git_show.log 2022-10-18 12:27:42 -07:00
M0stafaRady d13743ae41 cocotb - Add spi_rd_wr_nbyte test 2022-10-18 11:43:40 -07:00
Marwan Abbas 4b9df5271b
Merge pull request #287 from efabless/cocotb-dev
cocotb - ziping passed waves instead of removing them and fix bug at debug test
2022-10-18 17:15:50 +02:00
Marwan Abbas 38902bde45
Merge pull request #292 from efabless/caravel-redesign-digital_pll-decaps
reharden: digital_pll
2022-10-18 16:35:49 +02:00
Marwan Abbas 4cbf8ca4f6
Merge pull request #291 from efabless/caravel-redesign-clocking-decaps
reharden: caravel_clocking
2022-10-18 16:35:26 +02:00
kareem 68063ddadc reharden: digital_pll
~ increase width for more spread decaps
+ add or cells to cell exclude
~ change placement density in accordance to area
~ change padding to allow for space for decaps
2022-10-18 07:07:32 -07:00
kareem fdeb6003f3 Merge branch 'caravel_redesign-digital_pll-no-or' into caravel_redesign 2022-10-18 06:31:00 -07:00
kareem 3bd586b50c reharden: caravel_clocking
~ increase height for more spread decap insertion
+ add or cells to cell exclude
~ adjust pdn to have an offset half to pitch
~ change placement density in accordance to area
~ change padding to allow for space for decap insertion
2022-10-18 06:18:30 -07:00
mo-hosni 1110ae2fe8 update housekeeping views and openlane configuration 2022-10-18 04:07:27 -07:00
M0stafaRady 2a05ee19ae cocotb - fix bug at debug test for gate level 2022-10-18 03:49:45 -07:00
M0stafaRady d444c279b0 Merge branch 'caravel_redesign' into cocotb-dev 2022-10-18 03:46:47 -07:00
M0stafaRady 37beb80c50 Merge branch 'cocotb-dev' into cocotb 2022-10-18 03:14:45 -07:00
M0stafaRady 13c2f299d0 cocotb - update script to keep the test log when test pass 2022-10-18 03:12:58 -07:00
M0stafaRady c7df730c0a cocotb - ziping passed waves instead of removing them 2022-10-18 02:56:31 -07:00
kareem 712b784e16 reharden!: digital_pll
~ disable or gate
+ add nosynth list file
2022-10-17 12:33:25 -07:00
Mohamed Shalan 3fbc52ecbf
Merge pull request #276 from efabless/caravel_redesign-digital_pll-fanout
reharden!: digital_pll
2022-10-17 20:50:01 +02:00
mo-hosni 2d147966b9 Update housekeeping views and openlane configuration 2022-10-17 11:37:24 -07:00
kareem e5d9788a43 reharden!: digital_pll
~ enable synth buffering to fix fanout
~ add *buf_1* to no synth list
~ add attribute (* keep *) to the oscillator as dont
touch for yosys

!need to verify that the oscillator remains untouched
2022-10-17 10:56:01 -07:00
Passant 9c3fea9a4d update caravel top-level rtl to not buffer `porb_h` through the `mgmt_core_wrapper` 2022-10-17 10:46:31 -07:00
M0stafaRady 0f174d897f
Merge pull request #269 from efabless/cocotb
cocotb - fix debug test
2022-10-17 18:01:24 +02:00
M0stafaRady cf1519b929 cocotb - add debug test to regression lists 2022-10-17 08:57:20 -07:00
M0stafaRady b5234b269f fix debug test 2022-10-17 08:29:39 -07:00
M0stafaRady 4bbf9938c9
Merge pull request #266 from efabless/cocotb-dev
Cocotb - add delay at the test mgmt_gpio_bidir test
2022-10-17 16:47:11 +02:00
M0stafaRady 55eaf936b0 Cocotb - add delay at the test mgmt_gpio_bidir test 2022-10-17 04:35:29 -07:00
kareem a8794dff4b reharden: caravel
~ reharden with updated pdn
~ add stubs for non functional blocks
2022-10-17 03:59:28 -07:00
M0stafaRady de11170ab2 fix syntax error at gl/gpio_signal_buffering.v 2022-10-17 00:55:12 -07:00
marwaneltoukhy 2d28c973ee added views for caravel with power routing 2022-10-16 19:08:56 -07:00
marwaneltoukhy 7ec1eeb010 Merge branch 'caravel_redesign' into caravel_redesign-top-level 2022-10-16 18:39:39 -07:00