tangxifan
|
3c49af6a08
|
[test] code format
|
2024-05-20 21:28:46 -07:00 |
tangxifan
|
f25081eb31
|
[test] add a new test to validate ecb when tile modules are used
|
2024-05-20 21:10:49 -07:00 |
tangxifan
|
852b01aaff
|
[test] rework
|
2024-05-20 17:20:04 -07:00 |
tangxifan
|
d3d29a507f
|
[lib] update vtr
|
2024-05-20 17:17:10 -07:00 |
tangxifan
|
5fbf6c5621
|
Merge pull request #1676 from lnis-uofu/patch_update
Pulling refs/heads/master into master
|
2024-05-20 17:15:01 -07:00 |
github-actions[bot]
|
84a85fa81b
|
Updated Patch Count
|
2024-05-21 00:02:42 +00:00 |
tangxifan
|
a9a5fbee34
|
[test] add fully connected feedback connections to directlist
|
2024-05-20 17:02:20 -07:00 |
tangxifan
|
52ae484a7c
|
[core] fixed a bug on messed up wire connections for OPINs
|
2024-05-20 13:50:31 -07:00 |
tangxifan
|
807c37d3ff
|
[test] fixed some bugs
|
2024-05-20 13:47:22 -07:00 |
tangxifan
|
6146d0be9f
|
[arch] Move clb I to right side as left side is not supported yet
|
2024-05-20 13:43:04 -07:00 |
tangxifan
|
ca6e2f9831
|
[core] code format
|
2024-05-20 13:41:35 -07:00 |
tangxifan
|
8c3da74835
|
[lib] update vtr
|
2024-05-20 13:32:39 -07:00 |
tangxifan
|
4a791249bf
|
[core] fixed a bug on requirement wire model for direction connection which is part of a cb
|
2024-05-20 12:52:07 -07:00 |
tangxifan
|
b15e169490
|
[core] fixed a bug where wire model is expected on direct connections
|
2024-05-20 12:45:49 -07:00 |
tangxifan
|
65dd342c60
|
[arch] typo
|
2024-05-20 12:11:22 -07:00 |
tangxifan
|
653521755b
|
[test] add new testcase for ecb to basic regtest
|
2024-05-20 12:09:12 -07:00 |
tangxifan
|
bdc13e491e
|
[arch] adding openfpga arch for ecb
|
2024-05-20 12:04:52 -07:00 |
tangxifan
|
c795dd2f1a
|
[arch] adding a new arch where feedback loops are modelled by direct connections
|
2024-05-20 12:00:39 -07:00 |
tangxifan
|
1b8b5bc7ba
|
Merge pull request #1675 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-48c0303
Bump vtr-verilog-to-routing from `26bac8c` to `48c0303`
|
2024-05-20 11:36:56 -07:00 |
tangxifan
|
65a8db4f38
|
[arch] replace out-of-date keywords
|
2024-05-20 11:18:46 -07:00 |
tangxifan
|
9d87e99539
|
[lib] typo on keywords in XML parser
|
2024-05-20 11:15:43 -07:00 |
dependabot[bot]
|
03e1511fa6
|
Bump vtr-verilog-to-routing from `26bac8c` to `48c0303`
Bumps [vtr-verilog-to-routing](https://github.com/verilog-to-routing/vtr-verilog-to-routing) from `26bac8c` to `48c0303`.
- [Release notes](https://github.com/verilog-to-routing/vtr-verilog-to-routing/releases)
- [Commits](26bac8cbac...48c03037f3 )
---
updated-dependencies:
- dependency-name: vtr-verilog-to-routing
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-05-20 06:49:14 +00:00 |
tangxifan
|
b554a3d855
|
[core] code format
|
2024-05-19 17:24:38 -07:00 |
tangxifan
|
1a05c30b72
|
[lib] update vtr to latest
|
2024-05-19 17:24:08 -07:00 |
tangxifan
|
56aaa6a1f4
|
[core] sytax
|
2024-05-19 17:23:48 -07:00 |
tangxifan
|
065d77c679
|
[core] supporting opin connection to cb in tiles
|
2024-05-19 17:04:24 -07:00 |
tangxifan
|
9079056871
|
[core] now connect OPIN to CB in top-level module
|
2024-05-19 14:27:36 -07:00 |
tangxifan
|
5e0d208cc4
|
[core] update vtr
|
2024-05-19 14:20:56 -07:00 |
tangxifan
|
918bf79ca3
|
[core] update vtr and developing caches for OPIN lists just for connection blocks
|
2024-05-19 14:10:00 -07:00 |
tangxifan
|
772da3006b
|
[core] code format
|
2024-05-18 22:19:17 -07:00 |
tangxifan
|
304f34525e
|
[core] syntax
|
2024-05-18 22:17:52 -07:00 |
tangxifan
|
b533ea4060
|
[core] now cb module include OPIN nodes
|
2024-05-18 22:00:02 -07:00 |
tangxifan
|
926b9e9739
|
[core] code format
|
2024-05-18 12:33:19 -07:00 |
tangxifan
|
3b93bea3d1
|
[core] syntax
|
2024-05-18 12:29:38 -07:00 |
tangxifan
|
be1d7517c9
|
[doc] rework out-of-date syntax
|
2024-05-17 19:25:35 -07:00 |
tangxifan
|
0d8c21ca84
|
[core] add new type 'part_of_cb' for tile direct connections
|
2024-05-17 18:59:53 -07:00 |
tangxifan
|
16acaa004d
|
Merge pull request #1674 from lnis-uofu/patch_update
Pulling refs/heads/master into master
|
2024-05-16 17:03:31 -07:00 |
github-actions[bot]
|
c0d49270ba
|
Updated Patch Count
|
2024-05-17 00:02:39 +00:00 |
tangxifan
|
0980d7e2c1
|
Merge pull request #1667 from lnis-uofu/dependabot/submodules/yosys-7045cf5
Bump yosys from `07ac4c2` to `7045cf5`
|
2024-05-15 22:12:00 -07:00 |
dependabot[bot]
|
21dfa16647
|
Bump yosys from `07ac4c2` to `7045cf5`
Bumps [yosys](https://github.com/YosysHQ/yosys) from `07ac4c2` to `7045cf5`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](07ac4c2fae...7045cf509e )
---
updated-dependencies:
- dependency-name: yosys
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-05-14 08:12:02 +00:00 |
tangxifan
|
2bcf260dc6
|
Merge pull request #1666 from lnis-uofu/patch_update
Pulling refs/heads/master into master
|
2024-05-13 18:57:31 -07:00 |
github-actions[bot]
|
56efcbb272
|
Updated Patch Count
|
2024-05-14 00:02:53 +00:00 |
tangxifan
|
f45499aeec
|
Merge pull request #1665 from lnis-uofu/dependabot/submodules/yosys-07ac4c2
Bump yosys from `1657917` to `07ac4c2`
|
2024-05-13 11:32:57 -07:00 |
dependabot[bot]
|
056023d629
|
Bump yosys from `1657917` to `07ac4c2`
Bumps [yosys](https://github.com/YosysHQ/yosys) from `1657917` to `07ac4c2`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](1657917693...07ac4c2fae )
---
updated-dependencies:
- dependency-name: yosys
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-05-13 07:01:22 +00:00 |
tangxifan
|
4ea43f8848
|
Merge pull request #1664 from lnis-uofu/patch_update
Pulling refs/heads/master into master
|
2024-05-10 09:09:07 -07:00 |
github-actions[bot]
|
a06c1f28d5
|
Updated Patch Count
|
2024-05-10 16:06:08 +00:00 |
tangxifan
|
b8e3e95908
|
Merge pull request #1661 from lnis-uofu/patch_update
Pulling refs/heads/master into master
|
2024-05-10 09:04:37 -07:00 |
tangxifan
|
912bea1e26
|
Merge pull request #1663 from lnis-uofu/dependabot/submodules/yosys-1657917
Bump yosys from `514852a` to `1657917`
|
2024-05-10 09:04:16 -07:00 |
tangxifan
|
0ad015857f
|
Merge pull request #1662 from lnis-uofu/xt_rr_graph_preload_hotfix
[core] fixed a bug where incoming edges are not built after loading rr_graph in vpr
|
2024-05-10 09:03:31 -07:00 |
dependabot[bot]
|
85be16f918
|
Bump yosys from `514852a` to `1657917`
Bumps [yosys](https://github.com/YosysHQ/yosys) from `514852a` to `1657917`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](514852ae71...1657917693 )
---
updated-dependencies:
- dependency-name: yosys
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-05-10 07:01:17 +00:00 |