riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[lib] update vtr

This commit is contained in:
tangxifan 2024-05-20 13:32:39 -07:00
parent 4a791249bf
commit 8c3da74835
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
vtr-verilog-to-routing

@ -1 +1 @@
Subproject commit 48c03037f3520d8e964f947cd0df4d422e31697f
Subproject commit c27caa39bf4efd1614857d7c7e60590ac3d5c896