Baudouin Chauviere
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db059af8b8
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Lighten the regression test
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2019-10-03 13:33:28 -06:00 |
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Baudouin Chauviere
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c7e1f7d90b
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Added explicit_verilog to regression test in a clean way
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2019-10-03 10:17:04 -06:00 |
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Baudouin Chauviere
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33e50bbc8c
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fix
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2019-10-01 16:54:16 -06:00 |
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Baudouin Chauviere
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7c3ab38410
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Hot fix
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2019-10-01 16:40:16 -06:00 |
AurelienUoU
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feddcbcb21
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Merge remote-tracking branch 'origin/dev' into heterogeneous
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2019-09-23 11:41:38 -06:00 |
tangxifan
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5efea159c5
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Simplify part of regression test to min_route_chan_width
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2019-09-22 11:14:33 -06:00 |
Ganesh Gore
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1dffe54807
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-22 00:21:25 -06:00 |
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Ganesh Gore
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50039a4b6e
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Added remove run directory option
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2019-09-21 23:35:56 -06:00 |
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AurelienUoU
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cc0bfdd548
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Add testcase in regression test for architecture with 1 IO cell/IO block
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2019-09-20 10:27:26 -06:00 |
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tangxifan
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4e7af5cdc5
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update tileable_routing test
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2019-09-18 15:59:32 -06:00 |
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tangxifan
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0f0d06aad7
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add non-LUT intermediate buffer to test and apply minor bug fix
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2019-09-18 15:04:51 -06:00 |
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Ganesh Gore
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8afcba2c45
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-18 12:15:42 -06:00 |
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Ganesh Gore
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cd5fd6ce6c
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Added explicit checking to VVP execution
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2019-09-18 12:14:26 -06:00 |
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Ganesh Gore
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56c40ca06d
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-17 22:12:11 -06:00 |
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Ganesh Gore
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169732ccc1
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Added verbose option in VVP output
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2019-09-17 22:09:37 -06:00 |
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tangxifan
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d7ac7d3649
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start refactoring the switch block verilog generation
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2019-09-17 20:40:26 -06:00 |
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Ganesh Gore
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7be83235a0
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-16 21:25:26 -06:00 |
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Ganesh Gore
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678e3181ba
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Made compact_routing_hierarchy options uncond
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2019-09-16 21:22:13 -06:00 |
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tangxifan
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5abbfd6a0f
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add tileable routing to regression test
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2019-09-16 20:45:02 -06:00 |
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Ganesh Gore
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81b9c5b266
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Added flag for VVP exit code
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2019-09-14 12:35:47 -06:00 |
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Ganesh Gore
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d90329678a
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Merge remote-tracking branch 'lnis_origin/dev' into ganesh_dev
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2019-09-14 12:11:36 -06:00 |
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Ganesh Gore
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ec3854a648
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-14 00:14:17 -06:00 |
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Ganesh Gore
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e5c99c8b12
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Quick terminate on fail added
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2019-09-13 23:56:38 -06:00 |
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Ganesh Gore
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bd9e57bc37
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Added better task name
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2019-09-13 23:30:42 -06:00 |
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Ganesh Gore
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a6e592247e
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Replaced options exit_on fail and show_thread logs
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2019-09-13 22:50:20 -06:00 |
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Ganesh Gore
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d64bb18346
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Separated Modelsim tcl script generation
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2019-09-07 12:36:22 -04:00 |
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Ganesh Gore
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d55b7e9497
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-06 11:49:38 -04:00 |
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Ganesh Gore
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bcbcd463fe
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Added pending runs in log
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2019-09-06 11:48:13 -04:00 |
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Ganesh Gore
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9abc1e1e7d
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-05 13:12:41 -04:00 |
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Ganesh Gore
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702a7683a8
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Ensure strict exit of fpga_flow on error
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2019-09-05 10:23:35 -06:00 |
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tangxifan
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d2d750a15c
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debugged rram mux branch Verilog generation
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2019-09-02 16:21:29 -06:00 |
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Ganesh Gore
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48ec1eefcd
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Added fpga_task cmd options in doc [ci skip]
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2019-09-02 02:45:05 -06:00 |
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Ganesh Gore
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e37ac1a565
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-09-02 00:19:19 -06:00 |
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Ganesh Gore
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241b001282
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Added openfpga_task doc
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2019-09-01 22:15:53 -06:00 |
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Ganesh Gore
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ad4c688206
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Added print for JobID to architecture mapping
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2019-08-31 22:04:57 -06:00 |
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Ganesh Gore
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f4e99c150a
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resolve missing variable bug
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2019-08-31 21:55:32 -06:00 |
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Ganesh Gore
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3d4f7f66fd
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Updated to run with python3
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2019-08-31 21:42:31 -06:00 |
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Ganesh Gore
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06c0dbb328
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Added docuementation for fpga_flow
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2019-08-31 15:19:34 -06:00 |
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Ganesh Gore
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02137805c7
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Added python version check in flow and task scripts
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2019-08-29 22:14:30 -06:00 |
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Ganesh Gore
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a25124b58c
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Added additional PATH variables
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2019-08-29 21:37:07 -06:00 |
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Ganesh Gore
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f54a8522fa
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Log prints task stats
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2019-08-27 22:04:32 -06:00 |
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Ganesh Gore
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903c2b7705
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2019-08-27 21:38:17 -06:00 |
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Ganesh Gore
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715adc13ff
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Failed result do not throw error
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2019-08-27 21:25:38 -06:00 |
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tangxifan
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94538b5062
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add more testing architecture
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2019-08-27 18:44:58 -06:00 |
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tangxifan
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f04565386f
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refactored behavioral mux branch verilog generation
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2019-08-27 18:39:25 -06:00 |
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tangxifan
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de8a6bc833
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update regression tests
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2019-08-26 21:00:15 -06:00 |
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Ganesh Gore
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7a3ff94116
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Added blif task in travis script
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2019-08-25 01:28:21 -06:00 |
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Ganesh Gore
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937ebd1b85
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Merge remote-tracking branch 'lnis_origin/dev' into ganesh_dev
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2019-08-25 00:53:18 -06:00 |
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Ganesh Gore
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632c9d6976
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Added python execution path in config file
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2019-08-25 00:42:48 -06:00 |
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Ganesh Gore
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f558437ae1
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Added task for vpr_blif flow
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2019-08-25 00:23:39 -06:00 |