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Added blif task in travis script

This commit is contained in:
Ganesh Gore 2019-08-25 01:28:21 -06:00
parent 937ebd1b85
commit 7a3ff94116
2 changed files with 4 additions and 4 deletions
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4
.travis/script.sh
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@ -10,7 +10,7 @@ if [[ $TRAVIS_OS_NAME == 'osx' ]]; then
#make
mkdir build
cd build
cmake .. -DCMAKE_BUILD_TYPE=debug -DENABLE_VPR_GRAPHICS=off
cmake .. -DCMAKE_BUILD_TYPE=debug -DENABLE_VPR_GRAPHICS=off
make -j16
alias python3.5="python3"
ln -s /opt/local/bin/python3 /opt/local/bin/python3.5
@ -30,4 +30,4 @@ $SPACER
cd -
# python3.5 ./openfpga_flow/scripts/run_fpga_task.py regression/regression_quick
chmod 755 run_test.sh
./run_test.sh
python3.5 openfpga_flow/scripts/run_fpga_task.py blif_vpr_flow

4
openfpga_flow/tasks/blif_vpr_flow/config/task.conf
View File

@ -15,7 +15,7 @@ timeout_each_job = 20*60
fpga_flow=vpr_blif
[ARCHITECTURES]
arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/template/k6_N10_sram_chain_HC_DPRAM_template.xml
# arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/template/k6_N10_sram_chain_HC_DPRAM_template.xml
arch1=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/template/k6_N10_sram_chain_HC_template.xml
arch2=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/template/k8_N10_sram_chain_FC_template.xml
@ -41,7 +41,7 @@ vpr_fpga_verilog_print_report_timing_tcl=
vpr_fpga_verilog_print_sdc_pnr=
vpr_fpga_verilog_print_sdc_analysis=
vpr_fpga_x2p_compact_routing_hierarchy=
# end_flow_with_test=
end_flow_with_test=
# [SCRIPT_PARAM_2]