Commit Graph

203 Commits

Author SHA1 Message Date
Marcelina Kościelnicka f791328506 Add opt_mem_widen pass.
If all of us are wide, then none of us are!
2021-08-14 01:06:23 +02:00
Marcelina Kościelnicka 1f74ec3535 memory_share: Add -nosat and -nowiden options.
This unlocks wide port recognition by default.
2021-08-14 00:09:04 +02:00
Marcelina Kościelnicka 9fdedf4d1c memory_dff: Recognize soft transparency logic. 2021-08-13 23:08:32 +02:00
Marcelina Kościelnicka 616ace2d92 Add new opt_mem_priority pass. 2021-08-13 11:58:52 +02:00
Marcelina Kościelnicka d0d9aca2c3 memory_share: Pass addresses through sigmap_xmux everywhere.
This fixes wide port recognition in some cases.
2021-08-13 01:17:55 +02:00
Marcelina Kościelnicka 72d86c327e memory_dff: Recognize read ports with reset / initial value. 2021-08-11 14:17:48 +02:00
Marcelina Kościelnicka e6f3d1c225 kernel/mem: Introduce transparency masks. 2021-08-11 00:04:16 +02:00
Marcelina Kościelnicka d25b9088c8 Refactor common parts of SAT-using optimizations into a helper.
This also aligns the functionality:

- in all cases, the onehot attribute is used to create appropriate
  constraints (previously, opt_dff didn't do it at all, and share
  created one-hot constraints based on $pmux presence alone, which
  is unsound)
- in all cases, shift and mul/div/pow cells are now skipped when
  importing the SAT problem (previously only memory_share did this)
  — this avoids creating clauses for hard cells that are unlikely
  to help with proving the UNSATness needed for optimization
2021-08-09 16:54:35 +02:00
Marcelina Kościelnicka 63f9e0544f memory_share: Don't skip ports with EN wired to input for SAT sharing.
Fixes #2912.
2021-08-04 04:47:43 +02:00
Marcelina Kościelnicka 8733e1923a memory_bram: Move init data swizzling before other swizzling.
Fixes #2907.
2021-08-03 15:04:10 +02:00
Marcelina Kościelnicka 4451f7f5e9 memory_bram: Some refactoring
This will make more sense when the new transparency masks land.

Fixes #2902.
2021-08-01 16:51:24 +02:00
Claire Xenia Wolf 72787f52fc Fixing old e-mail addresses and deadnames
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
2021-06-08 00:39:36 +02:00
Marcelina Kościelnicka 13b901bf1c memory_map: Improve start_offset handling.
Fixes #2775.
2021-05-31 17:45:21 +02:00
Marcelina Kościelnicka 82f5829aba memory_share: Add read port merging.
This is mostly meant for wide port recognition, but may also happen to
merge some ports with compatible initial/reset values (eg. 0 vs x).
2021-05-29 16:05:58 +02:00
Marcelina Kościelnicka 2d10caabbc memory_share: Improve sat-based port sharing. 2021-05-28 14:25:33 +02:00
Marcelina Kościelnicka cbf6b719fe Make a few passes auto-call Mem::narrow instead of rejecting wide ports.
This essentially adds wide port support for free in passes that don't
have a usefully better way of handling wide ports than just breaking
them up to narrow ports, avoiding "please run memory_narrow" annoyance.
2021-05-28 00:40:56 +02:00
Marcelina Kościelnicka 1eae6025e7 memory_share: Improve same-address merging, recognize wide write ports. 2021-05-27 15:53:12 +02:00
Marcelina Kościelnicka d99fce3bc7 mem/extract_rdff: Fix "no FF made" edge case.
When converting a sync transparent read port with const address to async
read port, nothing at all needs to be done other than clk_enable change,
and thus we have no FF cell to return.  Handle this case correctly in
the helper and in its users.
2021-05-25 23:42:31 +02:00
Marcelina Kościelnicka 18806f1ef6 memory_bram: Reuse extract_rdff helper for make_outreg.
Also properly skip read ports with init value or reset when not making
use of make_outreg.  Proper support for matching those will land later.
2021-05-25 22:42:03 +02:00
Marcelina Kościelnicka 96c7d60304 memory_bram: Respect write port priority. 2021-05-25 16:28:33 +02:00
Marcelina Kościelnicka e0736c1622 Add memory_narrow pass. 2021-05-25 03:04:13 +02:00
Marcelina Kościelnicka 47f958ce45 memory_share: Add wide port support. 2021-05-25 02:57:32 +02:00
Marcelina Kościelnicka c1a4730739 memory_map: Add wide port support. 2021-05-25 02:57:32 +02:00
Marcelina Kościelnicka 69bf5c81c7 Reject wide ports in some passes that will never support them. 2021-05-25 02:07:25 +02:00
Marcelina Kościelnicka df2b79ca76 memory_share: Use Mem helpers. 2021-05-23 23:16:12 +02:00
Marcelina Kościelnicka afd5366fc2 extract_rdff: Add initvals parameter.
This is not used yet, but will be needed when read port reset/initial
value support lands.
2021-05-23 22:05:26 +02:00
Marcelina Kościelnicka d905990d01 memory_share: Split off feedback path finding as a separate pass.
memory_share is actually three passes in a trenchcoat.  Split off the
one that has the least in common with the other two as a separate pass.
2021-05-23 18:30:39 +02:00
Marcelina Kościelnicka 1eea06bcc0 Add new helper class for merging FFs into cells, use for memory_dff.
Fixes #1854.
2021-05-23 14:46:59 +02:00
Marcelina Kościelnicka 039f4f48d5 memory_memx: Use Mem helper. 2021-05-22 22:31:07 +02:00
Marcelina Kościelnicka 8c734e07b8 memory_dff: Use Mem helper. 2021-05-21 02:26:27 +02:00
Marcelina Kościelnicka a3528649c8 memory_dff: Remove now-useless write port handling. 2021-03-08 20:16:29 +01:00
Marcelina Kościelnicka bc717abad2 memory_dff: Remove code looking for $mux cells.
This job is now performed by `opt_dff`, which runs before this pass.
2021-03-08 16:58:12 +01:00
Marcelina Kościelnicka eb76d35e80 memory_dff: Fix needlessly duplicating enable bits.
When the register being merged into the EN signal happens to be a $sdff,
the current code creates a new $mux for every bit, even if they happen
to be identical (as is usually the case), preventing proper grouping
further down the flow.  Fix this by adding a simple cache.

Fixes #2409.
2020-10-22 13:03:42 +02:00
Marcelina Kościelnicka 21896e2a02 memory_bram: Use Mem helpers. 2020-10-21 17:51:20 +02:00
Marcelina Kościelnicka 1e8098279f memory_map: Use Mem helpers. 2020-10-21 17:51:20 +02:00
Marcelina Kościelnicka d390b380e1 memory_unpack: Use Mem helpers. 2020-10-21 17:51:20 +02:00
Marcelina Kościelnicka e9978aaf15 memory_collect: Use Mem helpers. 2020-10-21 17:51:20 +02:00
Marcelina Kościelnicka 248b193d6d memory_nordff: Use Mem helpers. 2020-10-21 17:51:20 +02:00
Marcelina Kościelnicka c9251eb26b memory_dff: Refactor to use FfInitVals. 2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka eae2edf3e4 memory_dff: recognize more dff cells 2020-07-23 20:55:28 +02:00
whitequark 7191dd16f9 Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
Xiretza edd8ff2c07
Add flooring division operator
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.

This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
2020-05-28 22:59:04 +02:00
Xiretza 17163cf43a
Add flooring modulo operator
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).

This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
2020-05-28 22:59:03 +02:00
David Shah 85672a6c1f memory_bram: Fix ignorance of valid, matched rules
Signed-off-by: David Shah <dave@ds0.me>
2020-04-10 21:48:04 +01:00
whitequark 93ef516d91
Merge pull request #1603 from whitequark/ice40-ram_style
ice40/ecp5: add support for both 1364.1 and Synplify/LSE RAM/ROM attributes
2020-04-10 14:51:01 +00:00
N. Engelhardt 7f33d43e3b
Merge pull request #1890 from boqwxp/cleanup_memory_collect
Clean up `passes/memory/memory_collect.cc`.
2020-04-09 14:01:29 +02:00
Alberto Gonzalez 652050b273
Clean up `passes/memory/memory_collect.cc`. 2020-04-09 05:43:05 +00:00
Alberto Gonzalez 685dc37d27
Clean up `passes/memory/memory_unpack.cc`. 2020-04-09 05:38:36 +00:00
whitequark e0def9e4d9 memory_map: add -attr option, to respect inference attributes.
Before this commit, memory_map (which is always a part of a synth
script) would always pick up any $mem cell that was not processed
by a preceding pass and lower it down to $dff/$mux cells.
This is undesirable for two reasons:
  * If there is an explicit inference attribute set on a $mem cell,
    e.g. (* ram_block *), then it is arguably incorrect to map such
    a memory to $dff/$mux cells.
  * If memory_map tries to lower a memory that was intended to
    be mapped to a large BRAM, it often takes extraordinarily long
    time to finish, produces an extremely large log file, and outputs
    an unusable design.

After this commit, properly invoked memory_map will not map any
memory that has an explicit inference attribute specified, solving
the first issue, and alleviating the second. The default behavior
is not changed.
2020-04-03 05:51:40 +00:00
Eddie Hung 956ecd48f7 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00