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Commit Graph

1987 Commits

Author SHA1 Message Date
Eddie Hung c39b1a6fcf Add comment about supporting $dffe in ice40_dsp 2019-08-01 15:13:18 -07:00
Eddie Hung ed7540a46f Pack P register properly 2019-08-01 15:10:43 -07:00
Eddie Hung e19d33b003 Cope with sign extension in mul2dsp 2019-08-01 12:44:56 -07:00
Eddie Hung ed303b07b7 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-08-01 12:02:16 -07:00
Eddie Hung c54a39069d CO is sign extension only if signed multiplier 2019-08-01 10:00:49 -07:00
Eddie Hung e3c39cc450 Fix typo 2019-08-01 10:00:01 -07:00
Eddie Hung e4a638c292 Restore old CO behaviour 2019-07-31 15:45:15 -07:00
Eddie Hung 07e38d8d5c Update test_autotb doc to reflect default value of zero 2019-07-26 12:37:30 -07:00
Eddie Hung 8cecad5059 Add doc for "test_autotb -seed" option 2019-07-26 12:26:54 -07:00
Eddie Hung 4c25d1a76f Pop the CO bit from O 2019-07-26 10:27:30 -07:00
Eddie Hung c1a05f4557 Allow adders/accumulators with 33 bits using CO output 2019-07-26 10:15:36 -07:00
Eddie Hung 79fd6edc5a Eliminate warnings by sizing O correctly 2019-07-23 15:13:30 -07:00
Eddie Hung a37574ccbf Fix muxAB logic 2019-07-23 14:52:14 -07:00
Eddie Hung 0dd2a125f6 Remove debug print 2019-07-23 14:21:45 -07:00
Eddie Hung dc0c853abe Simplify and fix for MACs 2019-07-23 14:20:34 -07:00
Eddie Hung 4f11ff8ebd Fix typo 2019-07-23 13:58:56 -07:00
Eddie Hung 33c984a044 Fix spacing 2019-07-22 16:37:13 -07:00
Eddie Hung 068617f094 Pack hi and lo registers separately 2019-07-22 16:12:57 -07:00
Eddie Hung 4d71ab384d Rename according to vendor doc TN1295 2019-07-22 15:08:26 -07:00
Eddie Hung 304cefbbe2 Pack Y register 2019-07-22 15:05:16 -07:00
Eddie Hung 5a14b6e1f6 Pack adders not just accumulators 2019-07-22 13:01:49 -07:00
Clifford Wolf c6d8692c97 Add "stat -tech cmos" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-07-20 15:06:28 +02:00
Eddie Hung e0720a8018 Restore old ffY behaviour 2019-07-19 22:47:08 -07:00
Eddie Hung f9d08a5e5e Cleanup 2019-07-19 20:25:28 -07:00
Eddie Hung e87916b7eb Merge remote-tracking branch 'origin/eddie/wreduce_add' into ice40dsp 2019-07-19 14:03:34 -07:00
Eddie Hung cb0fd05215 Do not access beyond bounds 2019-07-19 13:58:50 -07:00
Eddie Hung 3a87dc3524 Wrap A and B in sigmap 2019-07-19 13:23:07 -07:00
Eddie Hung 31b0002e8c Remove "top" from message 2019-07-19 13:20:45 -07:00
Eddie Hung 8791e0caac Merge remote-tracking branch 'origin/eddie/wreduce_add' into ice40dsp 2019-07-19 13:18:20 -07:00
Eddie Hung bcd8027182 Also optimise MSB of $sub 2019-07-19 13:11:48 -07:00
Eddie Hung fc0e36d1c0 wreduce for $sub 2019-07-19 12:50:21 -07:00
Eddie Hung 9ad11ea2cc Fine tune ice40_dsp.pmg, add support for packing subsets of registers 2019-07-19 10:57:32 -07:00
Eddie Hung 8f0e796be1 Add support for ice40 signed multipliers 2019-07-19 10:38:13 -07:00
Eddie Hung 42e40dbd0a Merge remote-tracking branch 'origin/master' into ice40dsp 2019-07-18 15:45:25 -07:00
Eddie Hung 09411dd996 ice40_dsp to accept $__MUL16X16 too 2019-07-18 15:38:28 -07:00
Eddie Hung 802470746c Check if RHS is empty first 2019-07-18 15:22:00 -07:00
Eddie Hung 90ac147eb2 Do not autoremove ffP aor muxP 2019-07-18 15:02:41 -07:00
Eddie Hung 08fe63c61e Improve pattern matcher to match subsets of $dffe? cells 2019-07-18 14:08:18 -07:00
Eddie Hung 79d63479ea Improve A/B reg packing 2019-07-18 13:30:35 -07:00
Eddie Hung e075f0dda0 Do not autoremove A/B registers since they might have other consumers 2019-07-18 13:22:22 -07:00
Eddie Hung 0727b2c902 Fix xilinx_dsp index cast 2019-07-18 13:18:04 -07:00
Eddie Hung c76607b9bc Wrong wildcard symbol 2019-07-18 08:14:58 -07:00
Eddie Hung 91629ee4b3 Pattern matcher to check pool of bits, not exactly 2019-07-17 12:45:25 -07:00
Eddie Hung 3f677fb0db Signed extension 2019-07-16 15:54:07 -07:00
Eddie Hung 9616dbd125 Add support {A,B,P}REG packing 2019-07-16 14:06:32 -07:00
Eddie Hung 5939b5d636
Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters 
abc9: push inverters driving box inputs (comb outputs) through $lut soft logic
 2019-07-16 08:53:47 -07:00
Eddie Hung ba8ccbdea8
Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix 
abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box
 2019-07-16 08:52:14 -07:00
Miodrag Milanovic 2b469e82a7 Fix check logic in extract_fa 2019-07-16 10:35:18 +02:00
Eddie Hung 5f00d335d4 Oops forgot these files 2019-07-15 15:03:15 -07:00
Eddie Hung dd59375a66 Add xilinx_dsp for register packing 2019-07-15 14:46:31 -07:00