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518 Commits

Author SHA1 Message Date
Marcelina Kościelnicka 01626e6746 opt_share: Fix X and CO signal width for shifted $alu in opt_share. 
These need to be the same length as actual Y, not visible part of Y.

Fixes #2538.
 2021-01-14 14:54:08 +01:00
StefanBruens 9396678db4
Fix use-after-free in LUT opt pass 
RTLIL::Module::remove(Cell* cell) calls `delete cell`.

Any subsequent accesses of `cell` then causes undefined behavior.
 2020-12-22 03:23:42 +01:00
Marcelina Kościelnicka 06141db233 opt_mem: Use Mem helpers. 2020-10-21 17:51:20 +02:00
Marcelina Kościelnicka 7670a89e1f opt_clean: Better memory handling. 
Previously, `$memwr` and `$meminit` cells were always preserved (along
with the memory itself).  With this change, they are instead part of the
main cell mark-and-sweep pass: a memory (and its `$meminit` and `$memwr`
cells) is only preserved iff any associated `$memrd` cell needs to be
preserved.
 2020-10-08 18:05:51 +02:00
N. Engelhardt 3238190797 use the new isPublic() in a few places 2020-09-14 12:43:18 +02:00
clairexen a96df40814
Merge pull request #2344 from YosysHQ/mwk/opt_share-fixes 
opt_share: Refactor, fix some bugs.
 2020-08-20 16:24:53 +02:00
clairexen 1d0d9d5c86
Merge pull request #2337 from YosysHQ/mwk/clean-keep-wire 
opt_clean: Fix module keep rules.
 2020-08-20 16:23:55 +02:00
Marcelina Kościelnicka 2b777bbda8 opt_share: Refactor, fix some bugs. 
Fixes #2334.
Fixes #2335.
Fixes #2336.
 2020-08-17 17:26:36 +02:00
Marcelina Kościelnicka 2ab350a7b0 opt_clean: Fix module keep rules. 
- wires with keep attribute now force a module to be kept
- presence of $memwr and $meminit cells no longer forces a module to be
  kept
 2020-08-09 13:57:00 +02:00
Marcelina Kościelnicka acd8c5c205 Remove now-redundant opt_rmdff pass. 2020-08-07 13:21:34 +02:00
Marcelina Kościelnicka 9a4f420b4b Replace opt_rmdff with opt_dff. 2020-08-07 13:21:03 +02:00
Marcelina Kościelnicka 6cd135a5eb opt_expr: Remove -clkinv option, make it the default. 
Adds -noclkinv option just in case the old behavior was actually useful
to someone.
 2020-07-31 00:08:15 +02:00
Marcelina Kościelnicka af6623ebb8 Add opt_dff pass. 2020-07-30 18:27:04 +02:00
Marcelina Kościelnicka dc18bf1969 opt_expr: Fix handling of $_XNOR_ cells with A = B. 
Fixes #2311.
 2020-07-29 12:41:43 +02:00
Marcelina Kościelnicka 31d6107521 pmux2shift: Refactor to use FfInitVals. 2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka 4d9105ccb0 wreduce: Refactor to use FfInitVals. 2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka 61a7ec4768 opt_merge: Dedup one more use of FF cell type list. 2020-07-15 06:19:18 +02:00
Marcelina Kościelnicka 7afcb72c98 opt_expr: Fix crash on $mul optimization with more zeros removed than Y has. 
Fixes #2221.
 2020-07-05 06:31:58 +02:00
Marcelina Kościelnicka 77b15dd8e9 opt_merge: use the master FF type list 2020-06-30 20:57:35 +02:00
clairexen c7d71f436d
Merge pull request #2168 from whitequark/assert-unused-exprs 
Use (and ignore) the expression provided to log_assert in NDEBUG builds
 2020-06-25 18:21:51 +02:00
Marcelina Kościelnicka 119f79d8b9 Add support for new FF types in some opt passes. 2020-06-23 15:40:02 +02:00
whitequark 118e4caa37 Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug(). 2020-06-19 15:48:58 +00:00
whitequark 7191dd16f9 Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
Claire Wolf 3c7122c378 Do not optimize away FFs in "prep" and Verific fron-end 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-06-09 15:54:14 +02:00
Xiretza edd8ff2c07
Add flooring division operator 
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.

This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
 2020-05-28 22:59:04 +02:00
Xiretza 17163cf43a
Add flooring modulo operator 
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).

This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
 2020-05-28 22:59:03 +02:00
Eddie Hung 7b3a4a1fff opt_expr: Sx to Sz; spotted by @Xiretza 2020-05-14 12:14:23 -07:00
Eddie Hung 73b7ea713c
Merge pull request #1994 from YosysHQ/eddie/fix_bug1758 
opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too
 2020-05-14 11:56:22 -07:00
Eddie Hung cd92a706ae Fix whitespace 2020-05-14 09:51:17 -07:00
Eddie Hung 5be4b00a0d opt_clean: improve warning message 2020-05-14 00:59:38 -07:00
Eddie Hung fc9fb09a91 opt_clean: rminit without -purge; also remove if consistent with const.. 
warn otherwise
 2020-05-14 00:31:08 -07:00
Eddie Hung 68b31f5e99 opt_clean: really make 'clean' identical to 'opt_clean' by rminit too 2020-05-14 00:31:08 -07:00
Eddie Hung 9694dc42dd opt_expr: consume_x to require/imply !keepdc 2020-05-08 11:12:43 -07:00
Eddie Hung 17f4e06247 opt_expr: restore consume_x; use for coarse grained too 2020-05-08 11:07:44 -07:00
Claire Wolf 2285cf1219 Fix the other "opt_expr -fine" bug introduced in 213a89558 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-05-02 21:50:43 +02:00
Claire Wolf 8ee32adac3 Fix "opt_expr -fine" bug introduced in 213a89558 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-05-01 20:12:16 +02:00
Eddie Hung b5f38f8342 opt_expr: const_xnor replacement to pad Y with 1'b1 2020-04-24 14:13:45 -07:00
Eddie Hung 83570bc0da opt_expr: more fixes for $xor/$xnor 2020-04-24 11:15:29 -07:00
Eddie Hung 90b71eb84b opt_expr: do not group by X, more fixes 2020-04-23 18:15:07 -07:00
Eddie Hung e7058593f4 opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too 2020-04-23 15:57:48 -07:00
Marcelina Kościelnicka 2f8541a92e opt_expr: Fix X and CO outputs for $alu identity-mapping rules. 2020-04-16 11:48:29 +02:00
Marcelina Kościelnicka 85166633bc opt_clean: Add missing assignments to opt.did_something. 2020-04-15 16:20:56 +02:00
Marcelina Kościelnicka 6c16fd760b opt_expr: Add more $alu optimizations. 
Detect the places in the $alu where the carry bit is constant (due to
const A[i] == B[i] ^ BI) and split it into smaller $alu at these points.

Also, make the existing const-carry detection for low bits more generic
(now handles cases where both BI and CI are constant, but not equal to
one another).

Fixes #1912.
 2020-04-14 21:48:13 +02:00
Marcelina Kościelnicka 840bb17089 opt_expr: Optimize multiplications with low 0 bits in operands. 
Fixes #1500.
 2020-04-13 16:52:22 +02:00
Marcelina Kościelnicka 516857f3ba [NFCI] Deduplicate builtin FF cell types list 
A few passes included the same list of FF cell types.  Make it a global
const instead.

The zinit pass also seems to include a list like that, but given that
it seems to be completely broken at the time (see #1568 discussion),
I'm going to pretend I didn't see that.
 2020-04-09 18:05:06 +02:00
Eddie Hung 956ecd48f7 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
Eddie Hung 37f42fe102
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup 
kernel: speedup by using more pass-by-const-ref
 2020-04-02 07:13:33 -07:00
Eddie Hung c90324662c
Merge pull request #1828 from YosysHQ/eddie/celltypes_speedup 
kernel: share a single CellTypes within a pass
 2020-04-01 14:17:45 -07:00
Eddie Hung 4ae7f3a8ed
Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor 
opt_expr: optimise $xor/$xnor/$_XOR_/$_XNOR_ -s with constant inputs
 2020-04-01 14:17:01 -07:00
Eddie Hung e79bc45975
Merge pull request #1789 from YosysHQ/eddie/opt_expr_alu 
opt_expr: improve performance on $alu and $sub
 2020-04-01 14:11:09 -07:00