Eddie Hung
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ee428f73ab
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Remove WIP ABC9 flop support
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2019-06-14 10:37:52 -07:00 |
Eddie Hung
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42f6b48d56
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Merge remote-tracking branch 'origin/master' into xaig
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2019-06-14 10:33:27 -07:00 |
Eddie Hung
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627a62a797
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Make doc consistent
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2019-06-14 10:32:46 -07:00 |
Eddie Hung
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1656c44373
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Cleanup
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2019-06-14 10:29:27 -07:00 |
Eddie Hung
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751e640c1d
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
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2019-06-14 10:29:16 -07:00 |
Eddie Hung
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474fe9f47a
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Merge pull request #1097 from YosysHQ/dave/xaig_ecp5
Add ECP5 ABC9 support (to xaig branch)
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2019-06-14 10:28:30 -07:00 |
Eddie Hung
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a3be25ab0d
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Cleanup
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2019-06-14 10:27:30 -07:00 |
Eddie Hung
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1948e7c846
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Cleanup/optimise toposort in write_xaiger
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2019-06-14 10:13:17 -07:00 |
Eddie Hung
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a5425a2f7e
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Remove extra semicolon
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2019-06-14 10:11:34 -07:00 |
Eddie Hung
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d005568f2e
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Add TODO to parse_xaiger
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2019-06-14 10:11:13 -07:00 |
David Shah
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9566573054
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ecp5: Add abc9 option
Signed-off-by: David Shah <dave@ds0.me>
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2019-06-14 17:15:02 +01:00 |
Bogdan Vukobratovic
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8451cbea89
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Move netlist helper module to passes/opt for the time being
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2019-06-14 12:14:02 +02:00 |
Bogdan Vukobratovic
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fe651922cb
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Merge remote-tracking branch 'upstream/master'
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2019-06-14 12:06:57 +02:00 |
Bogdan Vukobratovic
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53695e6729
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Prepare for situation when port of the signal cannot be found
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2019-06-14 11:39:24 +02:00 |
Bogdan Vukobratovic
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291b36afeb
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Some cleanup, revert sat.cc
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2019-06-14 11:35:45 +02:00 |
Eddie Hung
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bc22e2e3ee
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Optimise some more
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2019-06-13 17:02:58 -07:00 |
Eddie Hung
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d09d4e0706
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Move ConstEvalAig to aigerparse.cc
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2019-06-13 16:28:11 -07:00 |
Eddie Hung
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75d89e56cf
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Fix name clash
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2019-06-13 14:27:07 -07:00 |
Eddie Hung
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63e2f83632
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More slimming
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2019-06-13 13:29:03 -07:00 |
Eddie Hung
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d39a5a77a9
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Add ConstEvalAig specialised for AIGs
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2019-06-13 13:13:48 -07:00 |
Bogdan Vukobratovic
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8665f48879
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Implement disconnection of constant register bits
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2019-06-13 19:35:37 +02:00 |
Eddie Hung
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7f9d2d1825
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Update CHANGELOG with "synth -abc9"
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2019-06-13 09:15:30 -07:00 |
Eddie Hung
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2052806d33
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Fix LP SB_LUT4 timing
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2019-06-13 08:24:33 -07:00 |
Eddie Hung
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9d34cea65a
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More accurate CHANGELOG
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2019-06-13 08:22:22 -07:00 |
Bogdan Vukobratovic
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4912567cbf
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Pass SigBit by value to Netlist algorithms
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2019-06-13 15:42:45 +02:00 |
Serge Bazanski
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d4f77d408c
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Merge pull request #829 from abdelrahmanhosny/master
Dockerfile for Yosys
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2019-06-13 12:14:37 +02:00 |
Eddie Hung
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c04482b077
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Update CHANGELOG
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2019-06-12 16:54:12 -07:00 |
Eddie Hung
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2c40b66785
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Rip out all non FPGA stuff from abc9
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2019-06-12 16:53:12 -07:00 |
Eddie Hung
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f81a189fb8
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Fix spelling
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2019-06-12 16:52:09 -07:00 |
Eddie Hung
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90dc4d82de
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Revert "For 'stat' do not count modules with abc_box_id"
This reverts commit b89bb74452 .
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2019-06-12 16:51:37 -07:00 |
Eddie Hung
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9f275c1437
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Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux"
This reverts commit 2223ca91b0 , reversing
changes made to eaee250a6e .
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2019-06-12 16:33:05 -07:00 |
Eddie Hung
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009255d11d
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Move neg-pol to pos-pol mapping from ff_map to cells_map.v
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2019-06-12 16:07:24 -07:00 |
Eddie Hung
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b3faf0246d
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Be more precise when connecting during ABC9 re-integration
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2019-06-12 16:04:33 -07:00 |
Eddie Hung
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8374eb1cb4
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Remove unnecessary undriven_bits.insert
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2019-06-12 15:55:02 -07:00 |
Eddie Hung
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2e7e73f483
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Remove hacky wideports_split from abc9
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2019-06-12 15:52:49 -07:00 |
Eddie Hung
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d9974b85e7
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Fix compile errors when #if 1 for debug
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2019-06-12 15:47:39 -07:00 |
Eddie Hung
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342fc0a600
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parse_xaiger to cope with inouts
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2019-06-12 15:45:46 -07:00 |
Eddie Hung
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fb2758aade
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write_xaiger to preserve POs even if driven by constant
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2019-06-12 15:44:30 -07:00 |
Eddie Hung
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2e7b3eee40
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Add a couple more tests
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2019-06-12 15:43:43 -07:00 |
Bogdan Vukobratovic
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d69989b8d2
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Rename satgen_algo.h -> algo.h, code cleanup and refactoring
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2019-06-12 19:35:05 +02:00 |
Eddie Hung
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8bb67fa67c
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Do not call abc9 if no outputs
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2019-06-12 10:18:44 -07:00 |
Eddie Hung
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14e870d4c4
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More write_xaiger cleanup
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2019-06-12 10:00:57 -07:00 |
Eddie Hung
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4be417f6e1
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Cleanup write_xaiger
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2019-06-12 09:53:14 -07:00 |
Eddie Hung
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b21d29598a
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Consistency
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2019-06-12 09:40:51 -07:00 |
Eddie Hung
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c7f5091c2f
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Reduce diff with master
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2019-06-12 09:34:41 -07:00 |
Eddie Hung
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f9433cc34b
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Remove abc_flop{,_d} attributes from ice40/cells_sim.v
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2019-06-12 09:29:30 -07:00 |
Eddie Hung
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99267f660f
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Fix spacing
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2019-06-12 09:21:52 -07:00 |
Eddie Hung
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738fdfe8f5
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Remove wide mux inference
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2019-06-12 09:20:46 -07:00 |
Eddie Hung
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b2c72f74f0
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Merge branch 'xc7mux' into xaig
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2019-06-12 09:14:27 -07:00 |
Eddie Hung
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7eec64a38f
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Merge branch 'xc7mux' of github.com:YosysHQ/yosys into xc7mux
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2019-06-12 09:14:12 -07:00 |