Eddie Hung
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bca3779657
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Fix typo
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2019-04-11 09:25:19 -07:00 |
Eddie Hung
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87b8d29a90
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Juggle opt calls in synth_xilinx
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2019-04-11 09:13:39 -07:00 |
Eddie Hung
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227cc54c16
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Merge branch 'xaig' into xc7mux
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2019-04-10 18:07:11 -07:00 |
Eddie Hung
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2217d59e29
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Add non-input bits driven by unrecognised cells as ci_bits
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2019-04-10 18:06:33 -07:00 |
Eddie Hung
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cd7b2de27f
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WIP for cells_map.v -- maybe working?
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2019-04-10 18:05:09 -07:00 |
Eddie Hung
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3d577586fd
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Try splitting $shiftx with Y_WIDTH > 1 into Y_WIDTH = 1
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2019-04-10 16:15:23 -07:00 |
Eddie Hung
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3f5dab0d09
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Fix for when B_SIGNED = 1
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2019-04-10 14:51:10 -07:00 |
Eddie Hung
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32561332b2
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Update doc for synth_xilinx
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2019-04-10 14:48:58 -07:00 |
Eddie Hung
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bf92218e0f
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Merge branch 'xaig' into xc7mux
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2019-04-10 14:03:09 -07:00 |
Eddie Hung
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1a49cf29d8
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parse_aiger() to rename all $lut cells after "clean"
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2019-04-10 14:02:23 -07:00 |
Eddie Hung
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17a02df05c
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ff_map.v after abc
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2019-04-10 12:36:06 -07:00 |
Eddie Hung
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1ec949d5ed
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Tidy up
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2019-04-10 09:02:42 -07:00 |
Eddie Hung
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526aef9c2a
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Move map_cells to before map_luts
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2019-04-10 08:50:31 -07:00 |
Eddie Hung
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e0b46eb4cb
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WIP for $shiftx to wide mux
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2019-04-10 08:49:55 -07:00 |
Eddie Hung
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4dac9818bd
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Update LUT delays
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2019-04-10 08:49:39 -07:00 |
Eddie Hung
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9a6da9a79a
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synth_* with -retime option now calls abc with -D 1 as well
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2019-04-10 08:32:53 -07:00 |
Eddie Hung
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5f4024ffd2
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Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen"
This reverts commit 19271bd996 .
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2019-04-10 08:31:40 -07:00 |
Eddie Hung
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78d35a86c0
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Revert ""&nf -D 0" fails => use "-D 1" instead"
This reverts commit 3c253818ca .
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2019-04-10 08:31:35 -07:00 |
Eddie Hung
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c89cd48f58
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Merge remote-tracking branch 'origin/master' into eddie/fix_retime
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2019-04-10 08:23:00 -07:00 |
Eddie Hung
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3e368593eb
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Add cells.lut to techlibs/xilinx/
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2019-04-09 14:33:37 -07:00 |
Eddie Hung
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fd88ab5c83
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synth_xilinx to call abc with -lut +/xilinx/cells.lut
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2019-04-09 14:32:39 -07:00 |
Eddie Hung
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b9e19071b8
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Add delays to cells.box
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2019-04-09 14:32:10 -07:00 |
Eddie Hung
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d536379c62
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Add "-lut <file>" support to abc9
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2019-04-09 14:31:31 -07:00 |
Keith Rothman
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e107ccdde8
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Fix LUT6_2 definition.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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2019-04-09 11:43:19 -07:00 |
Eddie Hung
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f2042fc7c4
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synth_xilinx with abc9 to use -box
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2019-04-09 11:01:46 -07:00 |
Eddie Hung
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2ae26b986c
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Add techlibs/xilinx/cells.box
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2019-04-09 10:58:58 -07:00 |
Eddie Hung
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7e304c362b
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Add "-box" option to abc9
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2019-04-09 10:58:06 -07:00 |
Eddie Hung
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bd523abef5
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Add 'setundef -zero' call prior to aigmap in abc9
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2019-04-09 10:32:58 -07:00 |
Eddie Hung
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3b6f85b0a6
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Comment out
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2019-04-09 10:09:43 -07:00 |
Eddie Hung
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3fc474aa73
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Add support for synth_xilinx -abc9 and ignore abc9 -dress opt
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2019-04-09 10:06:44 -07:00 |
Zachary Snow
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5855024ccc
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support repeat loops with constant repeat counts outside of constant functions
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2019-04-09 12:28:32 -04:00 |
Keith Rothman
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5e0339855f
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Add additional cells sim models for core 7-series primatives.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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2019-04-09 09:01:53 -07:00 |
Eddie Hung
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0deaccbaae
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Fix a few typos
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2019-04-08 16:46:33 -07:00 |
Eddie Hung
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12c34136ba
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More space fixing
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2019-04-08 16:40:17 -07:00 |
Eddie Hung
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36efec01b8
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Fix spacing
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2019-04-08 16:37:22 -07:00 |
Eddie Hung
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bca3cf6843
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Merge branch 'master' into xaig
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2019-04-08 16:31:59 -07:00 |
Eddie Hung
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6797f6b6c4
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$_XILINX_SHREG_ to preserve src attribute
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2019-04-08 16:24:20 -07:00 |
Eddie Hung
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f6c354c55b
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Update CHANGELOG
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2019-04-08 16:22:07 -07:00 |
Eddie Hung
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7e773741ab
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Merge branch 'undo_pr895' into xc7srl
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2019-04-08 16:07:52 -07:00 |
Eddie Hung
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13fc70d7a4
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Undo #895 by instead setting an attribute
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2019-04-08 16:05:24 -07:00 |
Eddie Hung
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93b1621911
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Cope with undoing #895
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2019-04-08 15:57:07 -07:00 |
Clifford Wolf
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e194e65358
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Merge pull request #919 from YosysHQ/multiport_transp
memory_bram: Fix multiport make_transp
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2019-04-08 21:14:05 +02:00 |
Eddie Hung
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d3930ca79e
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Revert "Remove handling for $pmux, since #895"
This reverts commit aa693d5723 .
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2019-04-08 12:01:06 -07:00 |
David Shah
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2bf3ca6443
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memory_bram: Fix multiport make_transp
Signed-off-by: David Shah <dave@ds0.me>
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2019-04-07 16:56:31 +01:00 |
Benedikt Tutzer
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e19981ab61
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Suppress error from the compiler run during libboost-python* detection
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2019-04-07 10:11:35 +02:00 |
Eddie Hung
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1d526b7f06
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Call shregmap twice -- once for variable, another for fixed
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2019-04-05 17:35:49 -07:00 |
Eddie Hung
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4afcad70e2
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Merge branch 'eddie/fix_retime' into xc7srl
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2019-04-05 16:30:17 -07:00 |
Eddie Hung
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ad602438b8
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Add retime test
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2019-04-05 16:28:46 -07:00 |
Eddie Hung
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d559023007
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Fix S0 -> S1
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2019-04-05 16:28:14 -07:00 |
Eddie Hung
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a5f33b5409
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Move dffinit til after abc
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2019-04-05 16:20:43 -07:00 |