Martin Povišer
c6566b660f
memlib.md: Fix typo
2023-09-04 17:38:35 +02:00
Martin Povišer
3de84b959f
memory_libmap: Tweak whitespace
2023-09-04 17:38:35 +02:00
N. Engelhardt
57de249881
memory_libmap: print additional debug messages when no valid mapping is found
2023-07-06 18:54:32 +02:00
N. Engelhardt
a6be7b4751
memory_libmap: add debug messages for some reasons for rejecting mappings
2023-06-29 14:08:31 +02:00
N. Engelhardt
7542146fc5
memory_libmap: print message about attributes forcing ram kind
2023-06-28 17:48:20 +02:00
KrystalDelusion
9465b2af95
Fitting help messages to 80 character width
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Uses the regex below to search (using vscode):
^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);
Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
2022-08-24 10:40:57 +12:00
Jannis Harder
a2f9ebe43a
memory_map: Add -formal option
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This maps memories for a global clock based formal verification flow.
This implies -keepdc, uses $ff cells for ROMs and sets hdlname
attributes.
2022-08-16 13:37:30 +02:00
Jannis Harder
a6b440b5c9
memory_map: avoid undriven unused FF inputs for -keepdc
2022-06-28 19:05:35 +02:00
Jannis Harder
d78d807a7f
memory_map: -keepdc option for formal
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Use it when invoking memory_map -rom-only from write_{smt2,btor}.
2022-06-27 15:47:55 +02:00
Marcelina Kościelnicka
ab3a9325c3
memory_map: Add -rom-only option.
2022-06-17 16:56:11 +02:00
Marcelina Kościelnicka
01daa077a2
memory_map: Use const drivers instead of FFs for ROMs.
2022-06-17 15:17:14 +02:00
Marcelina Kościelnicka
d69091806a
memory_libmap: Fix wrprio handling.
2022-06-17 02:09:37 +02:00
Marcelina Kościelnicka
25a4cd7020
memory_libmap: Fix params emitted for unused ports for consistency.
2022-06-16 08:14:08 +02:00
Marcelina Kościelnicka
71dfbf33b2
Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.
2022-06-02 23:16:12 +02:00
Marcelina Kościelnicka
3a0aa9c663
memory_dff: Add support for no_rw_check attribute.
2022-06-02 12:49:34 +02:00
Marcelina Kościelnicka
606f1637ae
Add memory_bmux2rom pass.
2022-05-18 22:48:55 +02:00
Marcelina Kościelnicka
7c5dba8b77
Add memory_libmap pass.
2022-05-18 17:32:56 +02:00
imhcyx
71166eeecf
memory_share: fix wrong argidx in extra_args
2022-05-05 16:58:39 +08:00
Marcelina Kościelnicka
25ff83f0b5
memory_share: Fix up mismatched address widths.
2022-04-15 22:01:00 +02:00
Marcelina Kościelnicka
1759c80a3f
memory_bram: Make use of new mem emulation functions to map more RAMs.
2022-01-27 19:31:27 +01:00
Marcelina Kościelnicka
f84c9d8e17
memory_share: Fix SAT-based sharing for wide ports.
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Fixes #3117 .
2021-12-20 18:40:14 +01:00
Marcelina Kościelnicka
4e70c30775
FfData: some refactoring.
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- FfData now keeps track of the module and underlying cell, if any (so
calling emit on FfData created from a cell will replace the existing cell)
- FfData implementation is split off to its own .cc file for faster
compilation
- the "flip FF data sense by inserting inverters in front and after"
functionality that zinit uses is moved onto FfData class and beefed up
to have dffsr support, to support more use cases
2021-10-07 04:24:06 +02:00
Marcelina Kościelnicka
63b9df8693
kernel/ff: Refactor FfData to enable FFs with async load.
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- *_en is split into *_ce (clock enable) and *_aload (async load aka
latch gate enable), so both can be present at once
- has_d is removed
- has_gclk is added (to have a clear marker for $ff)
- d_is_const and val_d leftovers are removed
- async2sync, clk2fflogic, opt_dff are updated to operate correctly on
FFs with async load
2021-10-02 20:19:48 +02:00
Marcelina Kościelnicka
f791328506
Add opt_mem_widen pass.
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If all of us are wide, then none of us are!
2021-08-14 01:06:23 +02:00
Marcelina Kościelnicka
1f74ec3535
memory_share: Add -nosat and -nowiden options.
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This unlocks wide port recognition by default.
2021-08-14 00:09:04 +02:00
Marcelina Kościelnicka
9fdedf4d1c
memory_dff: Recognize soft transparency logic.
2021-08-13 23:08:32 +02:00
Marcelina Kościelnicka
616ace2d92
Add new opt_mem_priority pass.
2021-08-13 11:58:52 +02:00
Marcelina Kościelnicka
d0d9aca2c3
memory_share: Pass addresses through sigmap_xmux everywhere.
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This fixes wide port recognition in some cases.
2021-08-13 01:17:55 +02:00
Marcelina Kościelnicka
72d86c327e
memory_dff: Recognize read ports with reset / initial value.
2021-08-11 14:17:48 +02:00
Marcelina Kościelnicka
e6f3d1c225
kernel/mem: Introduce transparency masks.
2021-08-11 00:04:16 +02:00
Marcelina Kościelnicka
d25b9088c8
Refactor common parts of SAT-using optimizations into a helper.
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This also aligns the functionality:
- in all cases, the onehot attribute is used to create appropriate
constraints (previously, opt_dff didn't do it at all, and share
created one-hot constraints based on $pmux presence alone, which
is unsound)
- in all cases, shift and mul/div/pow cells are now skipped when
importing the SAT problem (previously only memory_share did this)
— this avoids creating clauses for hard cells that are unlikely
to help with proving the UNSATness needed for optimization
2021-08-09 16:54:35 +02:00
Marcelina Kościelnicka
63f9e0544f
memory_share: Don't skip ports with EN wired to input for SAT sharing.
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Fixes #2912 .
2021-08-04 04:47:43 +02:00
Marcelina Kościelnicka
8733e1923a
memory_bram: Move init data swizzling before other swizzling.
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Fixes #2907 .
2021-08-03 15:04:10 +02:00
Marcelina Kościelnicka
4451f7f5e9
memory_bram: Some refactoring
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This will make more sense when the new transparency masks land.
Fixes #2902 .
2021-08-01 16:51:24 +02:00
Claire Xenia Wolf
72787f52fc
Fixing old e-mail addresses and deadnames
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s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g ;
2021-06-08 00:39:36 +02:00
Marcelina Kościelnicka
13b901bf1c
memory_map: Improve start_offset handling.
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Fixes #2775 .
2021-05-31 17:45:21 +02:00
Marcelina Kościelnicka
82f5829aba
memory_share: Add read port merging.
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This is mostly meant for wide port recognition, but may also happen to
merge some ports with compatible initial/reset values (eg. 0 vs x).
2021-05-29 16:05:58 +02:00
Marcelina Kościelnicka
2d10caabbc
memory_share: Improve sat-based port sharing.
2021-05-28 14:25:33 +02:00
Marcelina Kościelnicka
cbf6b719fe
Make a few passes auto-call Mem::narrow instead of rejecting wide ports.
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This essentially adds wide port support for free in passes that don't
have a usefully better way of handling wide ports than just breaking
them up to narrow ports, avoiding "please run memory_narrow" annoyance.
2021-05-28 00:40:56 +02:00
Marcelina Kościelnicka
1eae6025e7
memory_share: Improve same-address merging, recognize wide write ports.
2021-05-27 15:53:12 +02:00
Marcelina Kościelnicka
d99fce3bc7
mem/extract_rdff: Fix "no FF made" edge case.
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When converting a sync transparent read port with const address to async
read port, nothing at all needs to be done other than clk_enable change,
and thus we have no FF cell to return. Handle this case correctly in
the helper and in its users.
2021-05-25 23:42:31 +02:00
Marcelina Kościelnicka
18806f1ef6
memory_bram: Reuse extract_rdff helper for make_outreg.
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Also properly skip read ports with init value or reset when not making
use of make_outreg. Proper support for matching those will land later.
2021-05-25 22:42:03 +02:00
Marcelina Kościelnicka
96c7d60304
memory_bram: Respect write port priority.
2021-05-25 16:28:33 +02:00
Marcelina Kościelnicka
e0736c1622
Add memory_narrow pass.
2021-05-25 03:04:13 +02:00
Marcelina Kościelnicka
47f958ce45
memory_share: Add wide port support.
2021-05-25 02:57:32 +02:00
Marcelina Kościelnicka
c1a4730739
memory_map: Add wide port support.
2021-05-25 02:57:32 +02:00
Marcelina Kościelnicka
69bf5c81c7
Reject wide ports in some passes that will never support them.
2021-05-25 02:07:25 +02:00
Marcelina Kościelnicka
df2b79ca76
memory_share: Use Mem helpers.
2021-05-23 23:16:12 +02:00
Marcelina Kościelnicka
afd5366fc2
extract_rdff: Add initvals parameter.
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This is not used yet, but will be needed when read port reset/initial
value support lands.
2021-05-23 22:05:26 +02:00
Marcelina Kościelnicka
d905990d01
memory_share: Split off feedback path finding as a separate pass.
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memory_share is actually three passes in a trenchcoat. Split off the
one that has the least in common with the other two as a separate pass.
2021-05-23 18:30:39 +02:00