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memlib.md: Fix typo

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Martin Povišer 2023-09-04 14:49:01 +02:00
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commit c6566b660f
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passes/memory/memlib.md
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@ -267,7 +267,7 @@ The address is always `abits` wide. If a non-narrowest width is used, the appro
bits will be tied to 0.
### Port `width` prooperty
### Port `width` property
If the RAM has `per_port` widths, the available width selection can be further described
on per-port basis, by using one of the following properties: