Clifford Wolf
30396270a2
Increase maximum LUT size in blifparse to 12 bits
2017-09-27 15:27:42 +02:00
Udi Finkelstein
e951ac0dfb
$size() now works correctly for all cases!
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It seems the issues was that AST_MULTIRANGE is converted into a multirange_dimensions[] array on the AST_MEMORY node directly.
2017-09-26 20:34:24 +03:00
Udi Finkelstein
6ddc6a7af4
$size() seems to work now with or without the optional parameter.
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Multidimensional arrays still don't work. I suspect the problem is that the array is flattened into a 1D array before $size() is evaluated.
2017-09-26 19:18:25 +03:00
Clifford Wolf
91d9c50bb3
Parse reals as string in JSON front-end
2017-09-26 14:37:03 +02:00
Clifford Wolf
660473a485
Merge branch 'vlogpp-inc-fixes'
2017-09-26 14:02:57 +02:00
Clifford Wolf
2c04d883b1
Minor coding style fix
2017-09-26 13:50:14 +02:00
Clifford Wolf
cb1d439d10
Merge branch 'master' of https://github.com/combinatorylogic/yosys into combinatorylogic-master
2017-09-26 13:48:13 +02:00
Udi Finkelstein
7e391ba904
enable $bits() and $size() functions only when the SystemVerilog flag is enabled for read_verilog
2017-09-26 09:19:56 +03:00
Udi Finkelstein
2dea42e903
Added $bits() for memories as well.
2017-09-26 09:11:25 +03:00
Udi Finkelstein
17f8b41605
$size() now works with memories as well!
2017-09-26 08:36:45 +03:00
Udi Finkelstein
64eb8f29ad
Add $size() function. At the moment it works only on expressions, not on memories.
2017-09-26 06:25:42 +03:00
Clifford Wolf
2cc09161ff
Fix ignoring of simulation timings so that invalid module parameters cause syntax errors
2017-09-26 01:52:59 +02:00
combinatorylogic
64ca0be971
Adding support for string macros and macros with arguments after include
2017-09-21 18:25:02 +01:00
Clifford Wolf
143c0abd33
Merge pull request #413 from azonenberg/extract-reduce-tweaks
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Added support for off-chain loads in extract_reduce
2017-09-16 11:31:37 +02:00
Andrew Zonenberg
2b65b65d70
Added missing "break"
2017-09-15 17:54:52 -07:00
Andrew Zonenberg
7b3966714c
Implemented off-chain support for extract_reduce
2017-09-15 13:59:18 -07:00
Andrew Zonenberg
3404934c9c
extract_reduce now only removes the head of the chain, relying on "clean" to delete upstream cells. Added "-allow-off-chain" flag, but it's currently ignored.
2017-09-15 13:59:05 -07:00
Clifford Wolf
5c4ea1366f
Merge branch 'master' of github.com:cliffordwolf/yosys
2017-09-15 21:28:16 +02:00
Clifford Wolf
76c11d7454
Update ABC to hg rev cd6984ee82d4
2017-09-15 21:25:59 +02:00
Clifford Wolf
ce78717e36
Merge pull request #412 from azonenberg/reduce-fixes
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extract_reduce: Fix segfault on "undriven" inputs
2017-09-14 22:36:25 +02:00
Robert Ou
ab1bf8d661
extract_reduce: Fix segfault on "undriven" inputs
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This is easily triggered when un-techmapping if the technology-specific
cell library isn't loaded. Outputs of technology-specific cells will be
seen as inputs, and nets using those outputs will be seen as undriven.
Just ignore these cells because they can't be part of a reduce chain
anyways.
2017-09-14 12:54:44 -07:00
Clifford Wolf
498526cc0b
Merge pull request #411 from azonenberg/counter-extraction-fixes
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Various improvements and bug fixes to extract_counter
2017-09-14 21:44:26 +02:00
Clifford Wolf
b0b2f3fe29
Merge pull request #410 from azonenberg/opt_demorgan
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Added "opt_demorgan" pass (fixes #408 )
2017-09-14 21:42:34 +02:00
Andrew Zonenberg
66e8986ae7
Minor changes to opt_demorgan requested during code review
2017-09-14 10:35:25 -07:00
Andrew Zonenberg
367d6b2194
Fixed bug where counter extraction on non-GreenPAK devices incorrectly handled parallel counter output
2017-09-14 10:27:10 -07:00
Andrew Zonenberg
c8f2f082c6
Added support for inferring counters with reset to full scale instead of zero
2017-09-14 10:26:43 -07:00
Andrew Zonenberg
122532b7e1
Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot yet be extracted.
2017-09-14 10:26:32 -07:00
Andrew Zonenberg
0484ad666d
Added support for inferring counters with active-low reset
2017-09-14 10:26:21 -07:00
Andrew Zonenberg
a84172b23b
Initial support for extraction of counters with clock enable
2017-09-14 10:26:10 -07:00
Andrew Zonenberg
c4a70a8cc3
Fixed typo in comment. Fixed bug where extract_counter would create up counters when it meant to create down counters.
2017-09-14 10:25:51 -07:00
Andrew Zonenberg
6da5d36968
Initial version of opt_demorgan is functioning for AND/OR gates. Not the prettiest results for bus inputs, but this can be improved
2017-09-12 18:47:46 -07:00
Clifford Wolf
f9d023c53f
Add src attribute to extra cells generated by proc_dlatch
2017-09-09 10:18:08 +02:00
Clifford Wolf
13eb47c692
Add src arguments to all cell creator helper functions
2017-09-09 10:16:48 +02:00
Clifford Wolf
7d41c5e177
Further improve extract_fa (but still buggy)
2017-09-02 16:39:17 +02:00
Clifford Wolf
2f75240e36
Merge pull request #406 from azonenberg/coolrunner-techmap
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Coolrunner techmapping improvements
2017-09-02 13:43:51 +02:00
Clifford Wolf
3331c281db
Merge pull request #405 from azonenberg/gpak-refactoring
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Gpak refactoring
2017-09-02 13:43:36 +02:00
Robert Ou
5f65e24ccb
coolrunner2: Finish fixing special-use p-terms
2017-09-01 07:22:16 -07:00
Robert Ou
fa04366f38
coolrunner2: Generate a feed-through AND term when necessary
2017-09-01 07:22:01 -07:00
Robert Ou
6775177171
coolrunner2: Initial fixes for special p-terms
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Certain signals can only be controlled by a product term and not a
sum-of-products. Do the initial work for fixing this.
2017-09-01 07:21:51 -07:00
Robert Ou
7f08be4304
coolrunner2: Fix mapping of flip-flops
2017-09-01 07:21:39 -07:00
Robert Ou
ac84f47829
coolrunner2: Combine some for loops together
2017-09-01 07:21:31 -07:00
Andrew Zonenberg
40021d2fd8
Fixed typo in error message
2017-09-01 06:45:10 -07:00
Andrew Zonenberg
fc0c7f74dc
Added blackbox $__COUNT_ cell model
2017-09-01 06:44:28 -07:00
Andrew Zonenberg
80aaf50302
Refactoring: moved modules still in cells_sim to cells_sim_wip
2017-09-01 06:44:15 -07:00
Clifford Wolf
18609f3df8
Merge branch 'master' of github.com:cliffordwolf/yosys
2017-09-01 12:35:09 +02:00
Clifford Wolf
307dc55d65
Merge branch 'ChipScan-master'
2017-09-01 12:33:47 +02:00
Clifford Wolf
8a66bd30c6
Update more stuff to use get_src_attribute() and set_src_attribute()
2017-09-01 12:26:55 +02:00
Jason Lowdermilk
8dc6083de7
updated to use get_src_attribute() and set_src_attribute().
2017-08-31 14:51:56 -06:00
Clifford Wolf
c9a4feba6a
Merge pull request #399 from azonenberg/counter-extraction
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Refactored counter extraction to not be GreenPAK specific. Fixes #396 .
2017-08-31 17:54:28 +02:00
Andrew Zonenberg
16043b79b6
Merge branch 'counter-extraction' of github.com:azonenberg/yosys into counter-extraction
2017-08-30 18:16:15 -07:00