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enable $bits() and $size() functions only when the SystemVerilog flag is enabled for read_verilog

This commit is contained in:
Udi Finkelstein 2017-09-26 09:19:56 +03:00
parent 2dea42e903
commit 7e391ba904
1 changed files with 1 additions and 1 deletions
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2
frontends/ast/simplify.cc
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@ -1870,7 +1870,7 @@ skip_dynamic_range_lvalue_expansion:;
goto apply_newNode;
}
if (str == "\\$size" || str == "\\$bits")
if (VERILOG_FRONTEND::sv_mode && (str == "\\$size" || str == "\\$bits"))
{
if (children.size() != 1)
log_error("System function %s got %d arguments, expected 1 at %s:%d.\n",